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target-arm: Translate with VFP len/stride from TB flags, not CPUState 

When translating, the VFP vector length and stride for this TB are encoded
in the TB flags; the CPUState copies may be different and must not be used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Peter Maydell 2011-01-14 20:39:19 +01:00 committed by Aurelien Jarno
parent 5df8bac1d3
commit 69d1fc221a
1 changed files with 7 additions and 3 deletions
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10
target-arm/translate.c
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@ -60,6 +60,8 @@ typedef struct DisasContext {
int user;
#endif
int vfp_enabled;
int vec_len;
int vec_stride;
} DisasContext;
#if defined(CONFIG_USER_ONLY)
@ -2895,7 +2897,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
rm = VFP_SREG_M(insn);
}
veclen = env->vfp.vec_len;
veclen = s->vec_len;
if (op == 15 && rn > 3)
veclen = 0;
@ -2916,9 +2918,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
veclen = 0;
} else {
if (dp)
delta_d = (env->vfp.vec_stride >> 1) + 1;
delta_d = (s->vec_stride >> 1) + 1;
else
delta_d = env->vfp.vec_stride + 1;
delta_d = s->vec_stride + 1;
if ((rm & bank_mask) == 0) {
/* mixed scalar/vector */
@ -9104,6 +9106,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
}
#endif
dc->vfp_enabled = ARM_TBFLAG_VFPEN(tb->flags);
dc->vec_len = ARM_TBFLAG_VECLEN(tb->flags);
dc->vec_stride = ARM_TBFLAG_VECSTRIDE(tb->flags);
cpu_F0s = tcg_temp_new_i32();
cpu_F1s = tcg_temp_new_i32();
cpu_F0d = tcg_temp_new_i64();