From 709f2c1b23ceb88c78a116e9a9c22e2a4837f62a Mon Sep 17 00:00:00 2001
From: "Igor V. Kovalenko" <igor.v.kovalenko@gmail.com>
Date: Thu, 7 Jan 2010 23:28:21 +0300
Subject: [PATCH] sparc64: add macros to deal with softint and timer interrupt
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
hw/sun4u.c | 1 -
target-sparc/cpu.h | 4 ++++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 9d46f08815..029e3edc5f 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -73,7 +73,6 @@
#define MAX_PILS 16
-#define TICK_INT_DIS 0x8000000000000000ULL
#define TICK_MAX 0x7fffffffffffffffULL
struct hwdef {
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 1fe4d0f1e4..0f0e38cf2c 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -394,6 +394,8 @@ typedef struct CPUSPARCState {
uint64_t fprs;
uint64_t tick_cmpr, stick_cmpr;
void *tick, *stick;
+#define TICK_NPT_MASK 0x8000000000000000ULL
+#define TICK_INT_DIS 0x8000000000000000ULL
uint64_t gsr;
uint32_t gl; // UA2005
/* UA 2005 hyperprivileged registers */
@@ -402,6 +404,8 @@ typedef struct CPUSPARCState {
uint32_t softint;
#define SOFTINT_TIMER 1
#define SOFTINT_STIMER (1 << 16)
+#define SOFTINT_INTRMASK (0xFFFE)
+#define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_TIMER)
#endif
sparc_def_t *def;
} CPUSPARCState;