mirror of https://gitee.com/openkylin/qemu.git
mc146818rtc: remove rtc_mm_init()
It was used for Acer Pica 61 emulation, removed in 2008 Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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parent
e0ca7b94da
commit
73c595e1d5
105
hw/mc146818rtc.c
105
hw/mc146818rtc.c
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@ -620,108 +620,3 @@ static void mc146818rtc_register(void)
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isa_qdev_register(&mc146818rtc_info);
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}
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device_init(mc146818rtc_register)
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/* Memory mapped interface */
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static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
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{
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RTCState *s = opaque;
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return cmos_ioport_read(s, addr >> s->it_shift) & 0xFF;
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}
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static void cmos_mm_writeb (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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RTCState *s = opaque;
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cmos_ioport_write(s, addr >> s->it_shift, value & 0xFF);
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}
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static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
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{
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RTCState *s = opaque;
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uint32_t val;
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val = cmos_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap16(val);
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#endif
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return val;
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}
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static void cmos_mm_writew (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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RTCState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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value = bswap16(value);
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#endif
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cmos_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
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}
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static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
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{
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RTCState *s = opaque;
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uint32_t val;
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val = cmos_ioport_read(s, addr >> s->it_shift);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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return val;
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}
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static void cmos_mm_writel (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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{
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RTCState *s = opaque;
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#ifdef TARGET_WORDS_BIGENDIAN
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value = bswap32(value);
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#endif
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cmos_ioport_write(s, addr >> s->it_shift, value);
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}
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static CPUReadMemoryFunc * const rtc_mm_read[] = {
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&cmos_mm_readb,
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&cmos_mm_readw,
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&cmos_mm_readl,
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};
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static CPUWriteMemoryFunc * const rtc_mm_write[] = {
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&cmos_mm_writeb,
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&cmos_mm_writew,
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&cmos_mm_writel,
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};
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RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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int base_year)
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{
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RTCState *s;
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int io_memory;
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s = qemu_mallocz(sizeof(RTCState));
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s->irq = irq;
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s->cmos_data[RTC_REG_A] = 0x26;
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s->cmos_data[RTC_REG_B] = 0x02;
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s->cmos_data[RTC_REG_C] = 0x00;
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s->cmos_data[RTC_REG_D] = 0x80;
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s->base_year = base_year;
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rtc_set_date_from_host(s);
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s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s);
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s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s);
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s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s);
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s->next_second_time =
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qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
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qemu_mod_timer(s->second_timer2, s->next_second_time);
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io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s);
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cpu_register_physical_memory(base, 2 << it_shift, io_memory);
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vmstate_register(base, &vmstate_rtc, s);
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qemu_register_reset(rtc_reset, s);
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return s;
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}
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2
hw/pc.h
2
hw/pc.h
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@ -83,8 +83,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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typedef struct RTCState RTCState;
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RTCState *rtc_init(int base_year);
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RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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int base_year);
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void rtc_set_memory(RTCState *s, int addr, int val);
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void rtc_set_date(RTCState *s, const struct tm *tm);
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void cmos_set_s3_resume(void);
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