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target-arm: Use clz opcode 

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2016-11-16 11:49:06 +01:00
parent b79ea941d6
commit 7539a012f6
6 changed files with 7 additions and 25 deletions
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10
target/arm/helper-a64.c
View File

@ -54,11 +54,6 @@ int64_t HELPER(sdiv64)(int64_t num, int64_t den)
return num / den;
}
uint64_t HELPER(clz64)(uint64_t x)
{
return clz64(x);
}
uint64_t HELPER(cls64)(uint64_t x)
{
return clrsb64(x);
@ -69,11 +64,6 @@ uint32_t HELPER(cls32)(uint32_t x)
return clrsb32(x);
}
uint32_t HELPER(clz32)(uint32_t x)
{
return clz32(x);
}
uint64_t HELPER(rbit64)(uint64_t x)
{
return revbit64(x);

2
target/arm/helper-a64.h
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@ -18,10 +18,8 @@
*/
DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64)
DEF_HELPER_FLAGS_1(clz64, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(cls64, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(cls32, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_FLAGS_1(clz32, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr)
DEF_HELPER_3(vfp_cmpes_a64, i64, f32, f32, ptr)

5
target/arm/helper.c
View File

@ -5725,11 +5725,6 @@ uint32_t HELPER(uxtb16)(uint32_t x)
return res;
}
uint32_t HELPER(clz)(uint32_t x)
{
return clz32(x);
}
int32_t HELPER(sdiv)(int32_t num, int32_t den)
{
if (den == 0)

1
target/arm/helper.h
View File

@ -1,4 +1,3 @@
DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_FLAGS_1(sxtb16, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_FLAGS_1(uxtb16, TCG_CALL_NO_RWG_SE, i32, i32)

8
target/arm/translate-a64.c
View File

@ -3954,11 +3954,11 @@ static void handle_clz(DisasContext *s, unsigned int sf,
tcg_rn = cpu_reg(s, rn);
if (sf) {
gen_helper_clz64(tcg_rd, tcg_rn);
tcg_gen_clzi_i64(tcg_rd, tcg_rn, 64);
} else {
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32();
tcg_gen_extrl_i64_i32(tcg_tmp32, tcg_rn);
gen_helper_clz(tcg_tmp32, tcg_tmp32);
tcg_gen_clzi_i32(tcg_tmp32, tcg_tmp32, 32);
tcg_gen_extu_i32_i64(tcg_rd, tcg_tmp32);
tcg_temp_free_i32(tcg_tmp32);
}
@ -7591,7 +7591,7 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
switch (opcode) {
case 0x4: /* CLS, CLZ */
if (u) {
gen_helper_clz64(tcg_rd, tcg_rn);
tcg_gen_clzi_i64(tcg_rd, tcg_rn, 64);
} else {
gen_helper_cls64(tcg_rd, tcg_rn);
}
@ -10261,7 +10261,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
goto do_cmop;
case 0x4: /* CLS */
if (u) {
gen_helper_clz32(tcg_res, tcg_op);
tcg_gen_clzi_i32(tcg_res, tcg_op, 32);
} else {
gen_helper_cls32(tcg_res, tcg_op);
}

6
target/arm/translate.c
View File

@ -7037,7 +7037,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
switch (size) {
case 0: gen_helper_neon_clz_u8(tmp, tmp); break;
case 1: gen_helper_neon_clz_u16(tmp, tmp); break;
case 2: gen_helper_clz(tmp, tmp); break;
case 2: tcg_gen_clzi_i32(tmp, tmp, 32); break;
default: abort();
}
break;
@ -8219,7 +8219,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
ARCH(5);
rd = (insn >> 12) & 0xf;
tmp = load_reg(s, rm);
gen_helper_clz(tmp, tmp);
tcg_gen_clzi_i32(tmp, tmp, 32);
store_reg(s, rd, tmp);
} else {
goto illegal_op;
@ -9992,7 +9992,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tcg_temp_free_i32(tmp2);
break;
case 0x18: /* clz */
gen_helper_clz(tmp, tmp);
tcg_gen_clzi_i32(tmp, tmp, 32);
break;
case 0x20:
case 0x21: