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target/ppc: Fix LPCR DPFD mask define 

The DPFD field in the LPCR is 3 bits wide. This has always been defined
as 0x3 << shift which indicates a 2 bit field, which is incorrect.
Correct this.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Suraj Jitindar Singh 2017-02-10 16:25:52 +11:00 committed by David Gibson
parent e0aee726bf
commit 7659ca1a3e
1 changed files with 1 additions and 1 deletions
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2
target/ppc/cpu.h
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@ -381,7 +381,7 @@ struct ppc_slb_t {
#define LPCR_ISL (1ull << (63 - 2))
#define LPCR_KBV (1ull << (63 - 3))
#define LPCR_DPFD_SHIFT (63 - 11)
#define LPCR_DPFD (0x3ull << LPCR_DPFD_SHIFT)
#define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT)
#define LPCR_VRMASD_SHIFT (63 - 16)
#define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT)
#define LPCR_RMLS_SHIFT (63 - 37)