mirror of https://gitee.com/openkylin/qemu.git
hw/openrisc/openrisc_sim: Parameterize initialization
Move magic numbers to variables and enums. These will be reused for upcoming fdt initialization. Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -49,6 +49,29 @@ typedef struct Or1ksimState {
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} Or1ksimState;
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enum {
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OR1KSIM_DRAM,
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OR1KSIM_UART,
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OR1KSIM_ETHOC,
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OR1KSIM_OMPIC,
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};
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enum {
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OR1KSIM_OMPIC_IRQ = 1,
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OR1KSIM_UART_IRQ = 2,
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OR1KSIM_ETHOC_IRQ = 4,
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};
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static const struct MemmapEntry {
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hwaddr base;
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hwaddr size;
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} or1ksim_memmap[] = {
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[OR1KSIM_DRAM] = { 0x00000000, 0 },
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[OR1KSIM_UART] = { 0x90000000, 0x100 },
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[OR1KSIM_ETHOC] = { 0x92000000, 0x800 },
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[OR1KSIM_OMPIC] = { 0x98000000, 16 },
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};
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static struct openrisc_boot_info {
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uint32_t bootstrap_pc;
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} boot_info;
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@ -176,21 +199,24 @@ static void openrisc_sim_init(MachineState *machine)
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memory_region_add_subregion(get_system_memory(), 0, ram);
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if (nd_table[0].used) {
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openrisc_sim_net_init(0x92000000, 0x92000400, smp_cpus,
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cpus, 4, nd_table);
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openrisc_sim_net_init(or1ksim_memmap[OR1KSIM_ETHOC].base,
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or1ksim_memmap[OR1KSIM_ETHOC].base + 0x400,
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smp_cpus, cpus,
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OR1KSIM_ETHOC_IRQ, nd_table);
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}
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if (smp_cpus > 1) {
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openrisc_sim_ompic_init(0x98000000, smp_cpus, cpus, 1);
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openrisc_sim_ompic_init(or1ksim_memmap[OR1KSIM_OMPIC].base, smp_cpus,
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cpus, OR1KSIM_OMPIC_IRQ);
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serial_irq = qemu_irq_split(get_cpu_irq(cpus, 0, 2),
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get_cpu_irq(cpus, 1, 2));
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serial_irq = qemu_irq_split(get_cpu_irq(cpus, 0, OR1KSIM_UART_IRQ),
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get_cpu_irq(cpus, 1, OR1KSIM_UART_IRQ));
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} else {
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serial_irq = get_cpu_irq(cpus, 0, 2);
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serial_irq = get_cpu_irq(cpus, 0, OR1KSIM_UART_IRQ);
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}
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serial_mm_init(get_system_memory(), 0x90000000, 0, serial_irq,
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115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
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serial_mm_init(get_system_memory(), or1ksim_memmap[OR1KSIM_UART].base, 0,
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serial_irq, 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
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openrisc_load_kernel(ram_size, kernel_filename);
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}
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