diff --git a/arch_init.c b/arch_init.c
index e3bb1b3ac4..07f047fad4 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -22,6 +22,8 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "sysemu/sysemu.h"
#include "sysemu/arch_init.h"
#include "hw/pci/pci.h"
diff --git a/audio/mixeng.c b/audio/mixeng.c
index 61ef8691a3..66c0328d42 100644
--- a/audio/mixeng.c
+++ b/audio/mixeng.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/bswap.h"
#include "audio.h"
#define AUDIO_CAP "mixeng"
diff --git a/audio/noaudio.c b/audio/noaudio.c
index b360c199ac..9ca9eaf01f 100644
--- a/audio/noaudio.c
+++ b/audio/noaudio.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include "audio.h"
#include "qemu/timer.h"
diff --git a/audio/spiceaudio.c b/audio/spiceaudio.c
index dea71d37af..5580e76307 100644
--- a/audio/spiceaudio.c
+++ b/audio/spiceaudio.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
+#include "qemu/host-utils.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
#include "ui/qemu-spice.h"
diff --git a/audio/wavaudio.c b/audio/wavaudio.c
index 345952e51e..341eec3121 100644
--- a/audio/wavaudio.c
+++ b/audio/wavaudio.c
@@ -22,7 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
-#include "hw/hw.h"
+#include "qemu/host-utils.h"
#include "qemu/timer.h"
#include "audio.h"
diff --git a/block/bochs.c b/block/bochs.c
index f0e18c0b84..6c8d0f3426 100644
--- a/block/bochs.c
+++ b/block/bochs.c
@@ -27,6 +27,7 @@
#include "qemu-common.h"
#include "block/block_int.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
/**************************************************************/
diff --git a/block/cloop.c b/block/cloop.c
index fc1ca3a05a..ea5a92b6d4 100644
--- a/block/cloop.c
+++ b/block/cloop.c
@@ -26,6 +26,7 @@
#include "qemu-common.h"
#include "block/block_int.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include <zlib.h>
/* Maximum compressed block size */
diff --git a/block/parallels.c b/block/parallels.c
index cddbfc4012..88cfacebe3 100644
--- a/block/parallels.c
+++ b/block/parallels.c
@@ -33,6 +33,7 @@
#include "block/block_int.h"
#include "sysemu/block-backend.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include "qemu/bitmap.h"
#include "qapi/util.h"
diff --git a/block/qcow.c b/block/qcow.c
index d6dc1b05b3..cb4bf0299f 100644
--- a/block/qcow.c
+++ b/block/qcow.c
@@ -28,6 +28,7 @@
#include "block/block_int.h"
#include "sysemu/block-backend.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include <zlib.h>
#include "qapi/qmp/qerror.h"
#include "crypto/cipher.h"
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index 31ecc10304..892e0fbfbf 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -29,6 +29,7 @@
#include "qemu-common.h"
#include "block/block_int.h"
#include "block/qcow2.h"
+#include "qemu/bswap.h"
#include "trace.h"
int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size,
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index ca6094ff5b..7fa972a383 100644
--- a/block/qcow2-refcount.c
+++ b/block/qcow2-refcount.c
@@ -28,6 +28,7 @@
#include "block/block_int.h"
#include "block/qcow2.h"
#include "qemu/range.h"
+#include "qemu/bswap.h"
static int64_t alloc_clusters_noref(BlockDriverState *bs, uint64_t size);
static int QEMU_WARN_UNUSED_RESULT update_refcount(BlockDriverState *bs,
diff --git a/block/qcow2-snapshot.c b/block/qcow2-snapshot.c
index 5f4a17e473..242fb21d6e 100644
--- a/block/qcow2-snapshot.c
+++ b/block/qcow2-snapshot.c
@@ -26,6 +26,7 @@
#include "qapi/error.h"
#include "block/block_int.h"
#include "block/qcow2.h"
+#include "qemu/bswap.h"
#include "qemu/error-report.h"
#include "qemu/cutils.h"
diff --git a/block/qcow2.c b/block/qcow2.c
index 62febfc386..49d7cff17a 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -36,6 +36,7 @@
#include "trace.h"
#include "qemu/option_int.h"
#include "qemu/cutils.h"
+#include "qemu/bswap.h"
/*
Differences with QCOW:
diff --git a/block/qed-table.c b/block/qed-table.c
index 802945f5e5..c841ad10fe 100644
--- a/block/qed-table.c
+++ b/block/qed-table.c
@@ -16,6 +16,7 @@
#include "trace.h"
#include "qemu/sockets.h" /* for EINPROGRESS on Windows */
#include "qed.h"
+#include "qemu/bswap.h"
typedef struct {
GenericCB gencb;
diff --git a/block/qed.c b/block/qed.c
index 10ce18eb66..b591d4a3fc 100644
--- a/block/qed.c
+++ b/block/qed.c
@@ -15,6 +15,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/timer.h"
+#include "qemu/bswap.h"
#include "trace.h"
#include "qed.h"
#include "qapi/qmp/qerror.h"
diff --git a/block/vdi.c b/block/vdi.c
index 54e11447c3..7d9ab9cc17 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -54,6 +54,7 @@
#include "block/block_int.h"
#include "sysemu/block-backend.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include "migration/migration.h"
#include "qemu/coroutine.h"
#include "qemu/cutils.h"
diff --git a/block/vhdx-endian.c b/block/vhdx-endian.c
index da33cd38ef..c306b90d54 100644
--- a/block/vhdx-endian.c
+++ b/block/vhdx-endian.c
@@ -18,6 +18,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "block/block_int.h"
+#include "qemu/bswap.h"
#include "block/vhdx.h"
#include <uuid/uuid.h>
diff --git a/block/vhdx-log.c b/block/vhdx-log.c
index 7ea7187fc4..8ab7d22d9a 100644
--- a/block/vhdx-log.c
+++ b/block/vhdx-log.c
@@ -23,6 +23,7 @@
#include "block/block_int.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include "block/vhdx.h"
diff --git a/block/vhdx.c b/block/vhdx.c
index ec778fe2a7..c0d24a24ee 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -22,6 +22,7 @@
#include "sysemu/block-backend.h"
#include "qemu/module.h"
#include "qemu/crc32c.h"
+#include "qemu/bswap.h"
#include "block/vhdx.h"
#include "migration/migration.h"
diff --git a/block/vmdk.c b/block/vmdk.c
index e6c97c25a6..1cb4b8529c 100644
--- a/block/vmdk.c
+++ b/block/vmdk.c
@@ -30,6 +30,7 @@
#include "qapi/qmp/qerror.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include "migration/migration.h"
#include "qemu/cutils.h"
#include <zlib.h>
diff --git a/block/vpc.c b/block/vpc.c
index 0379813e2f..076a7ce399 100644
--- a/block/vpc.c
+++ b/block/vpc.c
@@ -29,6 +29,7 @@
#include "sysemu/block-backend.h"
#include "qemu/module.h"
#include "migration/migration.h"
+#include "qemu/bswap.h"
#if defined(CONFIG_UUID)
#include <uuid/uuid.h>
#endif
diff --git a/block/vvfat.c b/block/vvfat.c
index 5b0c8dd639..3e484a1dcc 100644
--- a/block/vvfat.c
+++ b/block/vvfat.c
@@ -27,6 +27,7 @@
#include "qapi/error.h"
#include "block/block_int.h"
#include "qemu/module.h"
+#include "qemu/bswap.h"
#include "migration/migration.h"
#include "qapi/qmp/qint.h"
#include "qapi/qmp/qbool.h"
diff --git a/bootdevice.c b/bootdevice.c
index 2e83ff05eb..bb9c08e535 100644
--- a/bootdevice.c
+++ b/bootdevice.c
@@ -28,6 +28,7 @@
#include "qapi/visitor.h"
#include "qemu/error-report.h"
#include "hw/hw.h"
+#include "hw/qdev-core.h"
typedef struct FWBootEntry FWBootEntry;
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 27854c1f91..8e338c7f22 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -25,6 +25,7 @@
#include "qemu/help_option.h"
/* For tb_lock */
#include "cpu.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#include "qemu/timer.h"
#include "qemu/envlist.h"
@@ -849,6 +850,7 @@ int main(int argc, char **argv)
}
/* init debug */
+ qemu_log_needs_buffers();
qemu_set_log_filename(log_file);
if (log_mask) {
int mask;
diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index 03b502ad37..53163b8a47 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -19,6 +19,7 @@
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#undef DEBUG_REMAP
diff --git a/contrib/ivshmem-server/ivshmem-server.c b/contrib/ivshmem-server/ivshmem-server.c
index 172db78b37..bf4ee0b2e2 100644
--- a/contrib/ivshmem-server/ivshmem-server.c
+++ b/contrib/ivshmem-server/ivshmem-server.c
@@ -7,6 +7,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include "qemu/sockets.h"
#include <sys/mman.h>
diff --git a/cpu-exec-common.c b/cpu-exec-common.c
index 6bdda6b6b0..132cd03cde 100644
--- a/cpu-exec-common.c
+++ b/cpu-exec-common.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "sysemu/cpus.h"
+#include "exec/exec-all.h"
#include "exec/memory-internal.h"
bool exit_request;
diff --git a/cpu-exec.c b/cpu-exec.c
index 14df1aacf4..602d0c4d0c 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -20,6 +20,7 @@
#include "cpu.h"
#include "trace.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#include "qemu/atomic.h"
#include "sysemu/qtest.h"
diff --git a/cpus.c b/cpus.c
index cbeb1f6139..eb34b4fe76 100644
--- a/cpus.c
+++ b/cpus.c
@@ -24,7 +24,8 @@
/* Needed early for CONFIG_BSD etc. */
#include "qemu/osdep.h"
-
+#include "qemu-common.h"
+#include "cpu.h"
#include "monitor/monitor.h"
#include "qapi/qmp/qerror.h"
#include "qemu/error-report.h"
@@ -34,6 +35,7 @@
#include "sysemu/dma.h"
#include "sysemu/kvm.h"
#include "qmp-commands.h"
+#include "exec/exec-all.h"
#include "qemu/thread.h"
#include "sysemu/cpus.h"
diff --git a/cputlb.c b/cputlb.c
index 167280ae96..1ff6354b04 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -28,6 +28,7 @@
#include "exec/memory-internal.h"
#include "exec/ram_addr.h"
+#include "exec/exec-all.h"
#include "tcg/tcg.h"
/* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */
diff --git a/crypto/afsplit.c b/crypto/afsplit.c
index 8074913cdd..825e2cff26 100644
--- a/crypto/afsplit.c
+++ b/crypto/afsplit.c
@@ -24,6 +24,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/bswap.h"
#include "crypto/afsplit.h"
#include "crypto/random.h"
diff --git a/crypto/block-luks.c b/crypto/block-luks.c
index 439f89230c..17c4300f11 100644
--- a/crypto/block-luks.c
+++ b/crypto/block-luks.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/bswap.h"
#include "crypto/block-luks.h"
diff --git a/device_tree.c b/device_tree.c
index ccba1fd4a4..6e06320830 100644
--- a/device_tree.c
+++ b/device_tree.c
@@ -20,6 +20,7 @@
#include "qapi/error.h"
#include "qemu-common.h"
#include "qemu/error-report.h"
+#include "qemu/bswap.h"
#include "sysemu/device_tree.h"
#include "sysemu/sysemu.h"
#include "hw/loader.h"
diff --git a/disas/tci.c b/disas/tci.c
index 1cdf5eeafc..7233343fa1 100644
--- a/disas/tci.c
+++ b/disas/tci.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "disas/bfd.h"
+#include "exec/exec-all.h"
#include "tcg/tcg.h"
/* Disassemble TCI bytecode. */
diff --git a/exec.c b/exec.c
index ee45472cab..2e363f06a6 100644
--- a/exec.c
+++ b/exec.c
@@ -24,24 +24,26 @@
#include "qemu/cutils.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "tcg.h"
-#include "hw/hw.h"
+#include "hw/qdev-core.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/boards.h"
+#include "hw/xen/xen.h"
#endif
-#include "hw/qdev.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
-#include "hw/xen/xen.h"
#include "qemu/timer.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
-#include "exec/memory.h"
-#include "sysemu/dma.h"
-#include "exec/address-spaces.h"
#if defined(CONFIG_USER_ONLY)
#include <qemu.h>
#else /* !CONFIG_USER_ONLY */
+#include "hw/hw.h"
+#include "exec/memory.h"
+#include "exec/ioport.h"
+#include "sysemu/dma.h"
+#include "exec/address-spaces.h"
#include "sysemu/xen-mapcache.h"
#include "trace.h"
#endif
@@ -641,7 +643,6 @@ void cpu_exec_exit(CPUState *cpu)
void cpu_exec_init(CPUState *cpu, Error **errp)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
- int cpu_index;
Error *local_err = NULL;
cpu->as = NULL;
@@ -668,7 +669,7 @@ void cpu_exec_init(CPUState *cpu, Error **errp)
#if defined(CONFIG_USER_ONLY)
cpu_list_lock();
#endif
- cpu_index = cpu->cpu_index = cpu_get_free_index(&local_err);
+ cpu->cpu_index = cpu_get_free_index(&local_err);
if (local_err) {
error_propagate(errp, local_err);
#if defined(CONFIG_USER_ONLY)
@@ -678,14 +679,16 @@ void cpu_exec_init(CPUState *cpu, Error **errp)
}
QTAILQ_INSERT_TAIL(&cpus, cpu, node);
#if defined(CONFIG_USER_ONLY)
+ (void) cc;
cpu_list_unlock();
-#endif
+#else
if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
- vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
+ vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
}
if (cc->vmsd != NULL) {
- vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
+ vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
}
+#endif
}
#if defined(CONFIG_USER_ONLY)
diff --git a/gdbstub.c b/gdbstub.c
index 0e431fd4df..b9e3710bfe 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/cutils.h"
-
+#include "cpu.h"
#ifdef CONFIG_USER_ONLY
#include "qemu.h"
#else
@@ -35,6 +35,7 @@
#include "qemu/sockets.h"
#include "sysemu/kvm.h"
#include "exec/semihost.h"
+#include "exec/exec-all.h"
#ifdef CONFIG_USER_ONLY
#define GDB_ATTACHED "0"
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 6a2f452141..1ffd155c11 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -491,6 +491,12 @@ void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
}
}
+static inline int64_t acpi_pm_tmr_get_clock(void)
+{
+ return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
+ NANOSECONDS_PER_SECOND);
+}
+
void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar)
{
int64_t d = acpi_pm_tmr_get_clock();
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 9531340e56..fb925dccae 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nvdimm.c
@@ -378,17 +378,19 @@ struct NvdimmDsmIn {
uint32_t function;
/* the remaining size in the page is used by arg3. */
union {
- uint8_t arg3[0];
+ uint8_t arg3[4084];
};
} QEMU_PACKED;
typedef struct NvdimmDsmIn NvdimmDsmIn;
+QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn) != 4096);
struct NvdimmDsmOut {
/* the size of buffer filled by QEMU. */
uint32_t len;
- uint8_t data[0];
+ uint8_t data[4092];
} QEMU_PACKED;
typedef struct NvdimmDsmOut NvdimmDsmOut;
+QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut) != 4096);
struct NvdimmDsmFunc0Out {
/* the size of buffer filled by QEMU. */
@@ -424,8 +426,8 @@ nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
* can change its content while we are doing DSM emulation. Avoid
* this by copying DSM memory to QEMU local memory.
*/
- in = g_malloc(TARGET_PAGE_SIZE);
- cpu_physical_memory_read(dsm_mem_addr, in, TARGET_PAGE_SIZE);
+ in = g_new(NvdimmDsmIn, 1);
+ cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in));
le32_to_cpus(&in->revision);
le32_to_cpus(&in->function);
@@ -475,7 +477,7 @@ void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr);
state->dsm_mem = g_array_new(false, true /* clear */, 1);
- acpi_data_push(state->dsm_mem, TARGET_PAGE_SIZE);
+ acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
fw_cfg_add_file(fw_cfg, NVDIMM_DSM_MEM_FILE, state->dsm_mem->data,
state->dsm_mem->len);
}
@@ -608,7 +610,7 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets,
aml_append(dev, aml_operation_region("NPIO", AML_SYSTEM_IO,
aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));
aml_append(dev, aml_operation_region("NRAM", AML_SYSTEM_MEMORY,
- aml_name(NVDIMM_ACPI_MEM_ADDR), TARGET_PAGE_SIZE));
+ aml_name(NVDIMM_ACPI_MEM_ADDR), sizeof(NvdimmDsmIn)));
/*
* DSM notifier:
@@ -642,8 +644,7 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets,
aml_append(field, aml_named_field("FUNC",
sizeof(typeof_field(NvdimmDsmIn, function)) * BITS_PER_BYTE));
aml_append(field, aml_named_field("ARG3",
- (TARGET_PAGE_SIZE - offsetof(NvdimmDsmIn, arg3)) *
- BITS_PER_BYTE));
+ (sizeof(NvdimmDsmIn) - offsetof(NvdimmDsmIn, arg3)) * BITS_PER_BYTE));
aml_append(dev, field);
/*
@@ -659,8 +660,7 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets,
aml_append(field, aml_named_field("RLEN",
sizeof(typeof_field(NvdimmDsmOut, len)) * BITS_PER_BYTE));
aml_append(field, aml_named_field("ODAT",
- (TARGET_PAGE_SIZE - offsetof(NvdimmDsmOut, data)) *
- BITS_PER_BYTE));
+ (sizeof(NvdimmDsmOut) - offsetof(NvdimmDsmOut, data)) * BITS_PER_BYTE));
aml_append(dev, field);
nvdimm_build_common_dsm(dev);
@@ -678,7 +678,7 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets,
mem_addr_offset = build_append_named_dword(table_data,
NVDIMM_ACPI_MEM_ADDR);
- bios_linker_loader_alloc(linker, NVDIMM_DSM_MEM_FILE, TARGET_PAGE_SIZE,
+ bios_linker_loader_alloc(linker, NVDIMM_DSM_MEM_FILE, sizeof(NvdimmDsmIn),
false /* high memory */);
bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
NVDIMM_DSM_MEM_FILE, table_data,
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 16abdf1624..b3e3bb306a 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -39,6 +39,7 @@
#include "hw/acpi/memory_hotplug.h"
#include "hw/acpi/acpi_dev_interface.h"
#include "hw/xen/xen.h"
+#include "qom/cpu.h"
//#define DEBUG
diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index e11025b4be..fcaeb2b7aa 100644
--- a/hw/alpha/alpha_sys.h
+++ b/hw/alpha/alpha_sys.h
@@ -3,6 +3,7 @@
#ifndef HW_ALPHA_H
#define HW_ALPHA_H 1
+#include "target-alpha/cpu-qom.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/ide.h"
diff --git a/hw/alpha/pci.c b/hw/alpha/pci.c
index 5baa0eaf15..8dde637bfe 100644
--- a/hw/alpha/pci.c
+++ b/hw/alpha/pci.c
@@ -8,7 +8,6 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
-#include "cpu.h"
#include "alpha_sys.h"
#include "qemu/log.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/ast2400.c b/hw/arm/ast2400.c
index 03f993863b..5510a8a374 100644
--- a/hw/arm/ast2400.c
+++ b/hw/arm/ast2400.c
@@ -17,6 +17,7 @@
#include "exec/address-spaces.h"
#include "hw/arm/ast2400.h"
#include "hw/char/serial.h"
+#include "qemu/log.h"
#define AST2400_UART_5_BASE 0x00184000
#define AST2400_IOMEM_SIZE 0x00200000
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 8bb308a42e..2e69531287 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -18,6 +18,7 @@
#include "hw/block/flash.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
+#include "qom/cpu.h"
static struct arm_boot_info collie_binfo = {
.loader_start = SA_SDCS0,
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index c7068c0d38..d4eb141764 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -20,7 +20,9 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "cpu.h"
#include "qemu/cutils.h"
+#include "qemu/bswap.h"
#include "sysemu/sysemu.h"
#include "hw/arm/omap.h"
#include "hw/arm/arm.h"
@@ -35,6 +37,7 @@
#include "hw/loader.h"
#include "sysemu/block-backend.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
/* Nokia N8x0 support */
diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c
index 89ebd92b93..a51d960510 100644
--- a/hw/arm/palmetto-bmc.c
+++ b/hw/arm/palmetto-bmc.c
@@ -17,6 +17,7 @@
#include "hw/arm/arm.h"
#include "hw/arm/ast2400.h"
#include "hw/boards.h"
+#include "qemu/log.h"
static struct arm_boot_info palmetto_bmc_binfo = {
.loader_start = AST2400_SDRAM_BASE,
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index 67e7e70943..576a8eb91f 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -8,9 +8,11 @@
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "hw/arm/pxa.h"
+#include "qemu/log.h"
#define PXA2XX_GPIO_BANKS 4
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index f90b9fd190..44591716fe 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -17,6 +17,7 @@
#include "hw/i2c/i2c.h"
#include "net/net.h"
#include "hw/boards.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index a5ea1e2370..9c1dafbb19 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -25,7 +25,6 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
-#include "cpu.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "hw/arm/stm32f205_soc.h"
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 3bc8a98150..f1b2c6c966 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -38,6 +38,7 @@
#include "sysemu/sysemu.h"
#include "hw/ssi/ssi.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
//#define DEBUG
diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h
index 2893f94445..cd32bbdb0e 100644
--- a/hw/arm/strongarm.h
+++ b/hw/arm/strongarm.h
@@ -2,6 +2,7 @@
#define _STRONGARM_H
#include "exec/memory.h"
+#include "target-arm/cpu-qom.h"
#define SA_CS0 0x00000000
#define SA_CS1 0x08000000
diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
index 5f480182b2..40f7cc1425 100644
--- a/hw/arm/xlnx-ep108.c
+++ b/hw/arm/xlnx-ep108.c
@@ -23,6 +23,7 @@
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
typedef struct XlnxEP108 {
XlnxZynqMPState soc;
diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c
index 4717bc9b9c..6e9c104011 100644
--- a/hw/audio/pl041.c
+++ b/hw/audio/pl041.c
@@ -22,6 +22,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
#include "pl041.h"
#include "lm4549.h"
diff --git a/hw/block/hd-geometry.c b/hw/block/hd-geometry.c
index d388f13e9d..57ad5012a7 100644
--- a/hw/block/hd-geometry.c
+++ b/hw/block/hd-geometry.c
@@ -32,6 +32,7 @@
#include "qemu/osdep.h"
#include "sysemu/block-backend.h"
+#include "qemu/bswap.h"
#include "hw/block/block.h"
#include "trace.h"
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 5d308637df..4c856f5278 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -27,6 +27,7 @@
#include "sysemu/blockdev.h"
#include "hw/ssi/ssi.h"
#include "qemu/bitops.h"
+#include "qemu/log.h"
#ifndef M25P80_ERR_DEBUG
#define M25P80_ERR_DEBUG 0
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 3a1f85d279..31585e3aa1 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -45,6 +45,7 @@
#include "qemu/bitops.h"
#include "exec/address-spaces.h"
#include "qemu/host-utils.h"
+#include "qemu/log.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
diff --git a/hw/bt/hci-csr.c b/hw/bt/hci-csr.c
index 2e970b6561..e6b8998253 100644
--- a/hw/bt/hci-csr.c
+++ b/hw/bt/hci-csr.c
@@ -22,6 +22,7 @@
#include "qemu-common.h"
#include "sysemu/char.h"
#include "qemu/timer.h"
+#include "qemu/bswap.h"
#include "hw/irq.h"
#include "sysemu/bt.h"
#include "hw/bt.h"
diff --git a/hw/bt/l2cap.c b/hw/bt/l2cap.c
index 8065251947..dfc95ed048 100644
--- a/hw/bt/l2cap.c
+++ b/hw/bt/l2cap.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "qemu/timer.h"
+#include "qemu/bswap.h"
#include "hw/bt.h"
#define L2CAP_CID_MAX 0x100 /* Between 0x40 and 0x10000 */
diff --git a/hw/bt/sdp.c b/hw/bt/sdp.c
index be26009b0d..f67b3b89c0 100644
--- a/hw/bt/sdp.c
+++ b/hw/bt/sdp.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include "hw/bt.h"
struct bt_l2cap_sdp_state_s {
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 0394d11a88..319f1652f6 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -22,6 +22,7 @@
#include "qemu/osdep.h"
#include "hw/char/bcm2835_aux.h"
+#include "qemu/log.h"
#define AUX_IRQ 0x0
#define AUX_ENABLES 0x4
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 797787823e..442dac52cf 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -17,6 +17,10 @@
*/
#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "sysemu/char.h"
+#include "qemu/timer.h"
+#include "qemu/log.h"
#include "hw/char/cadence_uart.h"
#ifdef CADENCE_UART_ERR_DEBUG
diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c
index d3bc533d7c..0e44878405 100644
--- a/hw/char/digic-uart.c
+++ b/hw/char/digic-uart.c
@@ -30,6 +30,7 @@
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#include "hw/char/digic-uart.h"
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 6df74ac7c4..44856d671e 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -22,6 +22,7 @@
#include "hw/char/imx_serial.h"
#include "sysemu/sysemu.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_UART
#define DEBUG_IMX_UART 0
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 210c87b4c2..6876ea6eef 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#define TYPE_PL011 "pl011"
#define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011)
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index a94d61cebc..72305ec5d4 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/char/stm32f2xx_usart.h"
+#include "qemu/log.h"
#ifndef STM_USART_ERR_DEBUG
#define STM_USART_ERR_DEBUG 0
diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs
index abb3560bea..70951d4137 100644
--- a/hw/core/Makefile.objs
+++ b/hw/core/Makefile.objs
@@ -4,7 +4,7 @@ common-obj-y += fw-path-provider.o
# irq.o needed for qdev GPIO handling:
common-obj-y += irq.o
common-obj-y += hotplug.o
-common-obj-y += nmi.o
+obj-y += nmi.o
common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
common-obj-$(CONFIG_XILINX_AXI) += stream.o
diff --git a/hw/core/nmi.c b/hw/core/nmi.c
index e8bcc4177b..f616a79312 100644
--- a/hw/core/nmi.c
+++ b/hw/core/nmi.c
@@ -20,11 +20,16 @@
*/
#include "qemu/osdep.h"
+#include "qom/cpu.h"
#include "hw/nmi.h"
#include "qapi/error.h"
#include "qapi/qmp/qerror.h"
#include "monitor/monitor.h"
+#if defined(TARGET_I386)
+#include "cpu.h"
+#endif
+
struct do_nmi_s {
int cpu_index;
Error *err;
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index a7dbe2b324..c0f560b289 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -190,9 +190,9 @@ MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n)
return dev->mmio[n].memory;
}
-void sysbus_init_ioports(SysBusDevice *dev, pio_addr_t ioport, pio_addr_t size)
+void sysbus_init_ioports(SysBusDevice *dev, uint32_t ioport, uint32_t size)
{
- pio_addr_t i;
+ uint32_t i;
for (i = 0; i < size; i++) {
assert(dev->num_pio < QDEV_MAX_PIO);
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index 5459ae8c1b..f17f292090 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/cpu/a9mpcore.h"
+#include "qom/cpu.h"
static void a9mp_priv_set_irq(void *opaque, int irq, int level)
{
diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
index 506f1d3d90..7eab927652 100644
--- a/hw/display/bcm2835_fb.c
+++ b/hw/display/bcm2835_fb.c
@@ -29,6 +29,7 @@
#include "hw/display/framebuffer.h"
#include "ui/pixel_ops.h"
#include "hw/misc/bcm2835_mbox_defs.h"
+#include "qemu/log.h"
#define DEFAULT_VCRAM_SIZE 0x4000000
#define BCM2835_FB_OFFSET 0x00100000
diff --git a/hw/display/cg3.c b/hw/display/cg3.c
index fc0d97fa4b..1174220394 100644
--- a/hw/display/cg3.c
+++ b/hw/display/cg3.c
@@ -26,10 +26,12 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/error-report.h"
#include "ui/console.h"
#include "hw/sysbus.h"
#include "hw/loader.h"
+#include "qemu/log.h"
/* Change to 1 to enable debugging */
#define DEBUG_CG3 0
diff --git a/hw/display/pl110.c b/hw/display/pl110.c
index d589959f1b..c069c0b7fd 100644
--- a/hw/display/pl110.c
+++ b/hw/display/pl110.c
@@ -12,6 +12,7 @@
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
+#include "qemu/log.h"
#define PL110_CR_EN 0x001
#define PL110_CR_BGR 0x100
diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c
index da3ceceb0a..92f7120acc 100644
--- a/hw/display/tc6393xb.c
+++ b/hw/display/tc6393xb.c
@@ -12,6 +12,7 @@
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/host-utils.h"
#include "hw/hw.h"
#include "hw/devices.h"
#include "hw/block/flash.h"
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index c181fb364c..91345bd399 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -19,6 +19,7 @@
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-gpu.h"
#include "hw/virtio/virtio-bus.h"
+#include "qemu/log.h"
static struct virtio_gpu_simple_resource*
virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
index 5421175998..5d144a2633 100644
--- a/hw/dma/bcm2835_dma.c
+++ b/hw/dma/bcm2835_dma.c
@@ -6,6 +6,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/dma/bcm2835_dma.h"
+#include "qemu/log.h"
/* DMA CS Control and Status bits */
#define BCM2708_DMA_ACTIVE (1 << 0)
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c
index 9318108b81..3bed5c3390 100644
--- a/hw/dma/pl080.c
+++ b/hw/dma/pl080.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
#define PL080_MAX_CHANNELS 8
#define PL080_CONF_E 0x1
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index ea89ecb00e..c0bd9fec30 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -19,6 +19,7 @@
#include "qapi/error.h"
#include "qemu/timer.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
#ifndef PL330_ERR_DEBUG
#define PL330_ERR_DEBUG 0
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index a06c2359a7..2f2576fafb 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -27,6 +27,7 @@
#include "hw/mips/mips.h"
#include "hw/sysbus.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
#include "trace.h"
diff --git a/hw/gpio/gpio_key.c b/hw/gpio/gpio_key.c
index ef287727b6..b34aa49dfb 100644
--- a/hw/gpio/gpio_key.c
+++ b/hw/gpio/gpio_key.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/timer.h"
#define TYPE_GPIOKEY "gpio-key"
#define GPIOKEY(obj) OBJECT_CHECK(GPIOKEYState, (obj), TYPE_GPIOKEY)
diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c
index ed7e247f56..f3574aa8f3 100644
--- a/hw/gpio/imx_gpio.c
+++ b/hw/gpio/imx_gpio.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "hw/gpio/imx_gpio.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_GPIO
#define DEBUG_IMX_GPIO 0
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index 29dc7fc38e..44faeb23b7 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
//#define DEBUG_PL061 1
diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c
index e19d4fa745..37e5a62ce7 100644
--- a/hw/i2c/imx_i2c.c
+++ b/hw/i2c/imx_i2c.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "hw/i2c/imx_i2c.h"
#include "hw/i2c/i2c.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_I2C
#define DEBUG_IMX_I2C 0
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c
index fee3bc7619..0bce52416e 100644
--- a/hw/i2c/versatile_i2c.c
+++ b/hw/i2c/versatile_i2c.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "bitbang_i2c.h"
+#include "qemu/log.h"
#define TYPE_VERSATILE_I2C "versatile_i2c"
#define VERSATILE_I2C(obj) \
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 3c7c8fa007..c5983c79be 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -10,6 +10,8 @@
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/i386/apic_internal.h"
#include "hw/pci/msi.h"
#include "sysemu/kvm.h"
diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c
index a3b300cadf..0f75dd385a 100644
--- a/hw/i386/kvm/clock.c
+++ b/hw/i386/kvm/clock.c
@@ -15,6 +15,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/host-utils.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index a4462e5ca9..734992ead0 100644
--- a/hw/i386/kvm/i8254.c
+++ b/hw/i386/kvm/i8254.c
@@ -29,6 +29,7 @@
#include "hw/timer/i8254.h"
#include "hw/timer/i8254_internal.h"
#include "sysemu/kvm.h"
+#include "linux/kvm.h"
#define KVM_PIT_REINJECT_BIT 0
diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index bf425a2b9f..db2cbd2002 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -33,6 +33,7 @@
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
+#include "linux/kvm.h"
#include "kvm_i386.h"
#include "hw/pci/pci-assign.h"
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index f14445d4fb..8fd27ba2f4 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -9,6 +9,9 @@
* top-level directory.
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "sysemu/sysemu.h"
#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
diff --git a/hw/input/pl050.c b/hw/input/pl050.c
index 3092b0fe3b..be9cd57b17 100644
--- a/hw/input/pl050.c
+++ b/hw/input/pl050.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/input/ps2.h"
+#include "qemu/log.h"
#define TYPE_PL050 "pl050"
#define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c
index dc971a1603..11f13663c8 100644
--- a/hw/intc/allwinner-a10-pic.c
+++ b/hw/intc/allwinner-a10-pic.c
@@ -20,6 +20,7 @@
#include "hw/devices.h"
#include "sysemu/sysemu.h"
#include "hw/intc/allwinner-a10-pic.h"
+#include "qemu/log.h"
static void aw_a10_pic_update(AwA10PICState *s)
{
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 28c2ea5406..e1ab9354c6 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -17,6 +17,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/thread.h"
#include "hw/i386/apic_internal.h"
#include "hw/i386/apic.h"
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 4abe145c68..e6eb694de0 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -19,6 +19,8 @@
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/i386/apic.h"
#include "hw/i386/apic_internal.h"
#include "trace.h"
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 5ee79b83e6..06a22e0aaf 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -23,6 +23,7 @@
#include "gic_internal.h"
#include "qapi/error.h"
#include "qom/cpu.h"
+#include "qemu/log.h"
#include "trace.h"
//#define DEBUG_GIC
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index bc85ab769f..5593cdb3e4 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -21,6 +21,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/sysbus.h"
#include "migration/migration.h"
#include "sysemu/kvm.h"
diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c
index e8b5177dcc..3922fbc1c1 100644
--- a/hw/intc/arm_gicv2m.c
+++ b/hw/intc/arm_gicv2m.c
@@ -29,6 +29,8 @@
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
+#include "sysemu/kvm.h"
+#include "qemu/log.h"
#define TYPE_ARM_GICV2M "arm-gicv2m"
#define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 669e82adfc..890d5d7442 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -13,11 +13,13 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "gic_internal.h"
+#include "qemu/log.h"
typedef struct {
GICState gic;
diff --git a/hw/intc/bcm2835_ic.c b/hw/intc/bcm2835_ic.c
index 80513b28fd..00d25306fd 100644
--- a/hw/intc/bcm2835_ic.c
+++ b/hw/intc/bcm2835_ic.c
@@ -14,6 +14,7 @@
#include "qemu/osdep.h"
#include "hw/intc/bcm2835_ic.h"
+#include "qemu/log.h"
#define GPU_IRQS 64
#define ARM_IRQS 8
diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
index d0271810cc..cfa5bc7365 100644
--- a/hw/intc/bcm2836_control.c
+++ b/hw/intc/bcm2836_control.c
@@ -15,6 +15,7 @@
#include "qemu/osdep.h"
#include "hw/intc/bcm2836_control.h"
+#include "qemu/log.h"
#define REG_GPU_ROUTE 0x0c
#define REG_TIMERCONTROL 0x40
diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index bb43669b93..c2607a5868 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -27,6 +27,7 @@
#include "hw/isa/isa.h"
#include "monitor/monitor.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
#include "hw/isa/i8259_internal.h"
/* debug PIC */
diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index d21cb97451..813e587a63 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -17,6 +17,7 @@
#include "qemu/osdep.h"
#include "hw/intc/imx_avic.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_AVIC
#define DEBUG_IMX_AVIC 0
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index 378e663f65..4f42b911a2 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -24,6 +24,7 @@
#include "monitor/monitor.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
+#include "hw/i386/apic.h"
#include "hw/i386/ioapic.h"
#include "hw/i386/ioapic_internal.h"
#include "include/hw/pci/msi.h"
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index 2d3769310f..4349e45e04 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -44,6 +44,7 @@
#include "qapi/error.h"
#include "qemu/bitops.h"
#include "qapi/qmp/qerror.h"
+#include "qemu/log.h"
//#define DEBUG_OPENPIC
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index e47e94f2cf..0518e017c4 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -24,6 +24,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include <sys/ioctl.h>
#include "exec/address-spaces.h"
#include "hw/hw.h"
diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c
index 1e50baf237..55ea15de76 100644
--- a/hw/intc/pl190.c
+++ b/hw/intc/pl190.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
/* The number of virtual priority levels. 16 user vectors plus the
unvectored IRQ. Chained interrupts would require an additional level
diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c
index 02449b390e..eed6325cde 100644
--- a/hw/intc/s390_flic_kvm.c
+++ b/hw/intc/s390_flic_kvm.c
@@ -11,6 +11,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include <sys/ioctl.h>
#include "qemu/error-report.h"
#include "hw/sysbus.h"
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 9029d9ee0b..55fd801ffd 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -31,6 +31,7 @@
#include "cpu.h"
#include "hw/hw.h"
#include "trace.h"
+#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 99cd3ba9e1..4f8ca45f6d 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -47,6 +47,7 @@
#include "hw/pci/pci_bus.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
+#include "qom/cpu.h"
static int ich9_lpc_sci_irq(ICH9LPCState *lpc);
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 1bafbbb278..61208f8c69 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -81,11 +81,12 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
error_setg(errp, "%s: CPU initialization failed\n", __func__);
return;
}
- env = &cpu->env;
/* Init internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
+
+ env = &cpu->env;
if (cpu_mips_itu_supported(env)) {
itu_present = true;
/* Attach ITC Tag to the VP */
diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index efb227d06e..8a166b3ea7 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -151,8 +151,10 @@ static void mips_timer_cb (void *opaque)
env->CP0_Count--;
}
-void cpu_mips_clock_init (CPUMIPSState *env)
+void cpu_mips_clock_init (MIPSCPU *cpu)
{
+ CPUMIPSState *env = &cpu->env;
+
/*
* If we're in KVM mode, don't create the periodic timer, that is handled in
* kernel.
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index bdb716e725..889cdc7ca7 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -334,8 +334,8 @@ static void mips_fulong2e_init(MachineState *machine)
}
/* Init internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
/* North bridge, Bonito --> IP2 */
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 59081f9d1e..48192d22f3 100644
--- a/hw/mips/mips_int.c
+++ b/hw/mips/mips_int.c
@@ -58,8 +58,9 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
}
}
-void cpu_mips_irq_init_cpu(CPUMIPSState *env)
+void cpu_mips_irq_init_cpu(MIPSCPU *cpu)
{
+ CPUMIPSState *env = &cpu->env;
qemu_irq *qi;
int i;
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index ac7c641258..73f6c9facf 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -201,8 +201,8 @@ static void mips_jazz_init(MachineState *machine,
}
/* Init CPU internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
/* Chipset */
rc4030 = rc4030_init(&dmas, &rc4030_dma_mr);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index fa769e5c00..5c8ba44c62 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -923,11 +923,10 @@ static void create_cpu_without_cps(const char *cpu_model,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- env = &cpu->env;
/* Init internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
qemu_register_reset(main_cpu_reset, cpu);
}
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index a2c2a1646e..1b91195006 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -216,8 +216,8 @@ mips_mipssim_init(MachineState *machine)
}
/* Init CPU internal devices. */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
/* Register 64 KB of ISA IO space at 0x1fd00000. */
memory_region_init_alias(isa, NULL, "isa_mmio",
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 21aca981c2..16a59c779c 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -267,8 +267,8 @@ void mips_r4k_init(MachineState *machine)
}
/* Init CPU internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
+ cpu_mips_irq_init_cpu(cpu);
+ cpu_mips_clock_init(cpu);
/* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
memory_region_init_alias(isa_io, NULL, "isa-io",
diff --git a/hw/misc/arm11scu.c b/hw/misc/arm11scu.c
index 5e54b494be..7042ce11e8 100644
--- a/hw/misc/arm11scu.c
+++ b/hw/misc/arm11scu.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/misc/arm11scu.h"
+#include "qemu/log.h"
static uint64_t mpcore_scu_read(void *opaque, hwaddr offset,
unsigned size)
diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c
index 902605fef4..8a5f29559d 100644
--- a/hw/misc/arm_integrator_debug.c
+++ b/hw/misc/arm_integrator_debug.c
@@ -19,6 +19,7 @@
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
#include "hw/misc/arm_integrator_debug.h"
+#include "qemu/log.h"
#define INTEGRATOR_DEBUG(obj) \
OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG)
diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c
index 7e179f1a4e..4442227877 100644
--- a/hw/misc/arm_l2x0.c
+++ b/hw/misc/arm_l2x0.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
/* L2C-310 r3p2 */
#define CACHE_ID 0x410000c8
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index 34d90d5230..8524008708 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -14,6 +14,7 @@
#include "hw/sysbus.h"
#include "hw/arm/primecell.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#define LOCK_VALUE 0xa05f
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 263280fd49..e97cc814af 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/misc/bcm2835_mbox.h"
+#include "qemu/log.h"
#define MAIL0_PEEK 0x90
#define MAIL0_SENDER 0x94
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 34473469d4..70eaafd325 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -8,6 +8,7 @@
#include "hw/misc/bcm2835_property.h"
#include "hw/misc/bcm2835_mbox_defs.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
/* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */
diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c
index 225604d823..5cd8c0a9a7 100644
--- a/hw/misc/imx25_ccm.c
+++ b/hw/misc/imx25_ccm.c
@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "hw/misc/imx25_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX25_CCM
#define DEBUG_IMX25_CCM 0
diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c
index 80c1647166..1c03e52c40 100644
--- a/hw/misc/imx31_ccm.c
+++ b/hw/misc/imx31_ccm.c
@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "hw/misc/imx31_ccm.h"
+#include "qemu/log.h"
#define CKIH_FREQ 26000000 /* 26MHz crystal input */
diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index 4e1d49da69..ec58eef92d 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -12,6 +12,7 @@
#include "qemu/osdep.h"
#include "hw/misc/imx6_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX6_CCM
#define DEBUG_IMX6_CCM 0
diff --git a/hw/misc/imx6_src.c b/hw/misc/imx6_src.c
index 6b026b459f..8bb6829575 100644
--- a/hw/misc/imx6_src.c
+++ b/hw/misc/imx6_src.c
@@ -12,6 +12,7 @@
#include "hw/misc/imx6_src.h"
#include "sysemu/sysemu.h"
#include "qemu/bitops.h"
+#include "qemu/log.h"
#include "arm-powerctl.h"
#ifndef DEBUG_IMX6_SRC
diff --git a/hw/misc/imx_ccm.c b/hw/misc/imx_ccm.c
index 986d890caf..7f239a41d8 100644
--- a/hw/misc/imx_ccm.c
+++ b/hw/misc/imx_ccm.c
@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "hw/misc/imx_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_CCM
#define DEBUG_IMX_CCM 0
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index f15f301100..05c02fb3a4 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -29,6 +29,7 @@
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
/* XXX: implement all timer modes */
diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c
index 6051f17dbd..5632743d36 100644
--- a/hw/misc/macio/mac_dbdma.c
+++ b/hw/misc/macio/mac_dbdma.c
@@ -41,6 +41,7 @@
#include "hw/isa/isa.h"
#include "hw/ppc/mac_dbdma.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
/* debug DBDMA */
//#define DEBUG_DBDMA
diff --git a/hw/misc/mips_cmgcr.c b/hw/misc/mips_cmgcr.c
index 37be23995b..40f34643e3 100644
--- a/hw/misc/mips_cmgcr.c
+++ b/hw/misc/mips_cmgcr.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c
index d2b8e42da7..e6a35dd6a0 100644
--- a/hw/misc/mips_cpc.c
+++ b/hw/misc/mips_cpc.c
@@ -19,6 +19,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "cpu.h"
+#include "qemu/log.h"
#include "hw/sysbus.h"
#include "hw/misc/mips_cpc.h"
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index da5455062d..ef935b51a8 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -19,6 +19,9 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "cpu.h"
+#include "qemu/log.h"
+#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index 2f2e989778..7d5990213e 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -21,6 +21,7 @@
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "qemu/event_notifier.h"
+#include "sysemu/kvm.h"
typedef struct PCITestDevHdr {
uint8_t test;
diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c
index d0d7076eff..7c45833d09 100644
--- a/hw/misc/stm32f2xx_syscfg.c
+++ b/hw/misc/stm32f2xx_syscfg.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/misc/stm32f2xx_syscfg.h"
+#include "qemu/log.h"
#ifndef STM_SYSCFG_ERR_DEBUG
#define STM_SYSCFG_ERR_DEBUG 0
diff --git a/hw/misc/zynq-xadc.c b/hw/misc/zynq-xadc.c
index 71fbccd79f..14906103c9 100644
--- a/hw/misc/zynq-xadc.c
+++ b/hw/misc/zynq-xadc.c
@@ -18,6 +18,7 @@
#include "hw/misc/zynq-xadc.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
enum {
CFG = 0x000 / 4,
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index b1b7591ef6..7891219001 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -19,6 +19,7 @@
#include "qemu/timer.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#ifndef ZYNQ_SLCR_ERR_DEBUG
#define ZYNQ_SLCR_ERR_DEBUG 0
diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c
index 16d4b63ba0..d57502300c 100644
--- a/hw/net/allwinner_emac.c
+++ b/hw/net/allwinner_emac.c
@@ -21,6 +21,7 @@
#include "net/net.h"
#include "qemu/fifo8.h"
#include "hw/net/allwinner_emac.h"
+#include "qemu/log.h"
#include <zlib.h>
static uint8_t padding[60];
diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c
index 1e35f7f8c5..98250e0591 100644
--- a/hw/net/fsl_etsec/etsec.c
+++ b/hw/net/fsl_etsec/etsec.c
@@ -33,6 +33,7 @@
#include "hw/ptimer.h"
#include "etsec.h"
#include "registers.h"
+#include "qemu/log.h"
/* #define HEX_DUMP */
/* #define DEBUG_REGISTER */
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index ed1de7da9b..79d2f14dd8 100644
--- a/hw/net/fsl_etsec/rings.c
+++ b/hw/net/fsl_etsec/rings.c
@@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
#include "net/checksum.h"
-
+#include "qemu/log.h"
#include "etsec.h"
#include "registers.h"
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index e60e3380e4..9055ea89a9 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/net/imx_fec.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
/* For crc32 */
#include <zlib.h>
diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index 08dc474d61..205207356c 100644
--- a/hw/net/lan9118.c
+++ b/hw/net/lan9118.c
@@ -16,6 +16,7 @@
#include "hw/devices.h"
#include "sysemu/sysemu.h"
#include "hw/ptimer.h"
+#include "qemu/log.h"
/* For crc32 */
#include <zlib.h>
diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c
index a647f25d96..a8266f8ec7 100644
--- a/hw/net/spapr_llan.c
+++ b/hw/net/spapr_llan.c
@@ -28,6 +28,7 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "net/net.h"
#include "hw/qdev.h"
#include "hw/ppc/spapr.h"
@@ -106,9 +107,9 @@ typedef struct VIOsPAPRVLANDevice {
NICConf nicconf;
NICState *nic;
bool isopen;
- target_ulong buf_list;
+ hwaddr buf_list;
uint32_t add_buf_ptr, use_buf_ptr, rx_bufs;
- target_ulong rxq_ptr;
+ hwaddr rxq_ptr;
uint32_t compat_flags; /* Compatability flags for migration */
RxBufPool *rx_pool[RX_MAX_POOLS]; /* Receive buffer descriptor pools */
} VIOsPAPRVLANDevice;
@@ -765,11 +766,11 @@ static const VMStateDescription vmstate_spapr_llan = {
VMSTATE_SPAPR_VIO(sdev, VIOsPAPRVLANDevice),
/* LLAN state */
VMSTATE_BOOL(isopen, VIOsPAPRVLANDevice),
- VMSTATE_UINTTL(buf_list, VIOsPAPRVLANDevice),
+ VMSTATE_UINT64(buf_list, VIOsPAPRVLANDevice),
VMSTATE_UINT32(add_buf_ptr, VIOsPAPRVLANDevice),
VMSTATE_UINT32(use_buf_ptr, VIOsPAPRVLANDevice),
VMSTATE_UINT32(rx_bufs, VIOsPAPRVLANDevice),
- VMSTATE_UINTTL(rxq_ptr, VIOsPAPRVLANDevice),
+ VMSTATE_UINT64(rxq_ptr, VIOsPAPRVLANDevice),
VMSTATE_END_OF_LIST()
},
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index aaef7bb3a1..babbbef0c2 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -36,6 +36,7 @@
#include "hw/pci-host/apb.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
/* debug APB */
//#define DEBUG_APB
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 339ec2c508..0792c4501c 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -13,6 +13,7 @@
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
/* Old and buggy versions of QEMU used the wrong mapping from
* PCI IRQs to system interrupt lines. Unfortunately the Linux
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index b00565c3d3..94b454551f 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -14,6 +14,7 @@
#include "e500.h"
#include "hw/boards.h"
#include "sysemu/device_tree.h"
+#include "sysemu/kvm.h"
#include "hw/pci/pci.h"
#include "hw/ppc/openpic.h"
#include "kvm_ppc.h"
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 38ff2e1596..cdf9f258ae 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -164,9 +164,9 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
}
}
-void ppc6xx_irq_init(CPUPPCState *env)
+void ppc6xx_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
PPC6xx_INPUT_NB);
@@ -251,9 +251,9 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
}
}
-void ppc970_irq_init(CPUPPCState *env)
+void ppc970_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
PPC970_INPUT_NB);
@@ -287,9 +287,9 @@ static void power7_set_irq(void *opaque, int pin, int level)
}
}
-void ppcPOWER7_irq_init(CPUPPCState *env)
+void ppcPOWER7_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
POWER7_INPUT_NB);
@@ -372,9 +372,9 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
}
}
-void ppc40x_irq_init(CPUPPCState *env)
+void ppc40x_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
cpu, PPC40x_INPUT_NB);
@@ -436,9 +436,9 @@ static void ppce500_set_irq(void *opaque, int pin, int level)
}
}
-void ppce500_irq_init(CPUPPCState *env)
+void ppce500_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
cpu, PPCE500_INPUT_NB);
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 7d59018fc2..e7f413e49d 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 3ffb85e601..07ffe72de1 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -22,6 +22,7 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/timer/m48t59.h"
#include "hw/i386/pc.h"
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index b69995e0dc..de1de1d067 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -29,6 +29,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/fw-path-provider.h"
#include "elf.h"
#include "net/net.h"
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 8f40602a5e..feb3629664 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1,12 +1,15 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "helper_regs.h"
#include "hw/ppc/spapr.h"
#include "mmu-hash64.h"
#include "cpu-models.h"
#include "trace.h"
+#include "sysemu/kvm.h"
#include "kvm_ppc.h"
struct SPRSyncState {
diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index 7dd458846e..722db91ffa 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "sysemu/kvm.h"
#include "hw/qdev.h"
#include "kvm_ppc.h"
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 573e635bfb..e55b505c96 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -44,6 +44,7 @@
#include "hw/pci/pci_bus.h"
#include "hw/ppc/spapr_drc.h"
#include "sysemu/device_tree.h"
+#include "sysemu/kvm.h"
#include "hw/vfio/vfio.h"
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index f07325831c..43e2c684fd 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -26,11 +26,13 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "sysemu/char.h"
#include "hw/qdev.h"
#include "sysemu/device_tree.h"
#include "sysemu/cpus.h"
+#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index 8aa021fde9..d084aedadf 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -22,6 +22,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/loader.h"
@@ -584,7 +585,7 @@ const VMStateDescription vmstate_spapr_vio = {
VMSTATE_UINT32_EQUAL(irq, VIOsPAPRDevice),
/* General VIO device state */
- VMSTATE_UINTTL(signal_state, VIOsPAPRDevice),
+ VMSTATE_UINT64(signal_state, VIOsPAPRDevice),
VMSTATE_UINT64(crq.qladdr, VIOsPAPRDevice),
VMSTATE_UINT32(crq.qsize, VIOsPAPRDevice),
VMSTATE_UINT32(crq.qnext, VIOsPAPRDevice),
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index b807a08c28..b97d96685c 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/sysbus.h"
#include "hw/hw.h"
#include "hw/char/serial.h"
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index 3a1d919580..1675a19ac2 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -14,8 +14,8 @@
#include "qemu/bitops.h"
#include "exec/address-spaces.h"
#include "cpu.h"
-#include "ioinst.h"
-#include "css.h"
+#include "hw/s390x/ioinst.h"
+#include "hw/s390x/css.h"
#include "trace.h"
#include "hw/s390x/s390_flic.h"
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 6528ffed17..d772cfc7ea 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -15,6 +15,7 @@
#include "migration/qemu-file.h"
#include "hw/s390x/storage-keys.h"
#include "qemu/error-report.h"
+#include "sysemu/kvm.h"
#define S390_SKEYS_BUFFER_SIZE 131072 /* Room for 128k storage keys */
#define S390_SKEYS_SAVE_FLAG_EOS 0x01
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 4456fce9f1..18bbbfbbe2 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -18,8 +18,8 @@
#include "s390-virtio.h"
#include "hw/s390x/sclp.h"
#include "hw/s390x/s390_flic.h"
-#include "ioinst.h"
-#include "css.h"
+#include "hw/s390x/ioinst.h"
+#include "hw/s390x/css.h"
#include "virtio-ccw.h"
#include "qemu/config-file.h"
#include "s390-pci-bus.h"
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index d51642db0d..a1c1ed9496 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -16,6 +16,7 @@
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "sysemu/sysemu.h"
+#include "sysemu/kvm.h"
#include "net/net.h"
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-serial.h"
@@ -28,8 +29,8 @@
#include "hw/s390x/adapter.h"
#include "hw/s390x/s390_flic.h"
-#include "ioinst.h"
-#include "css.h"
+#include "hw/s390x/ioinst.h"
+#include "hw/s390x/css.h"
#include "virtio-ccw.h"
#include "trace.h"
diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h
index 66c831ba84..86b9edb18f 100644
--- a/hw/s390x/virtio-ccw.h
+++ b/hw/s390x/virtio-ccw.h
@@ -24,7 +24,8 @@
#include <hw/virtio/virtio-rng.h>
#include <hw/virtio/virtio-bus.h>
-#include "css.h"
+#include <hw/s390x/s390_flic.h>
+#include <hw/s390x/css.h>
#define VIRTUAL_CSSID 0xfe
diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c
index e87abb2051..eb783c6b51 100644
--- a/hw/sd/pl181.c
+++ b/hw/sd/pl181.c
@@ -12,6 +12,7 @@
#include "sysemu/blockdev.h"
#include "hw/sysbus.h"
#include "hw/sd/sd.h"
+#include "qemu/log.h"
//#define DEBUG_PL181 1
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 87e3d23a3d..87c6dc108d 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -39,6 +39,7 @@
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
//#define DEBUG_SD 1
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index d28b5871fc..01fbf228be 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -30,6 +30,7 @@
#include "qemu/timer.h"
#include "qemu/bitops.h"
#include "sdhci-internal.h"
+#include "qemu/log.h"
/* host controller debug messages */
#ifndef SDHC_DEBUG
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index a1ea760f68..3132d559d7 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -30,6 +30,7 @@
#include "sh7750_regnames.h"
#include "hw/sh4/sh_intc.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/address-spaces.h"
#define NB_DEVICES 4
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index d5dd42aca6..4226199811 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "hw/ssi/imx_spi.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_SPI
#define DEBUG_IMX_SPI 0
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index 564a0d36e7..c1368018ee 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/ssi/ssi.h"
+#include "qemu/log.h"
//#define DEBUG_PL022 1
diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c
index 51cdc98f3a..3385e5dc35 100644
--- a/hw/timer/allwinner-a10-pit.c
+++ b/hw/timer/allwinner-a10-pit.c
@@ -19,6 +19,7 @@
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "hw/timer/allwinner-a10-pit.h"
+#include "qemu/log.h"
static void a10_pit_update_irq(AwA10PITState *s)
{
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index f1ede5f53b..111a16db37 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -14,6 +14,7 @@
#include "hw/qdev.h"
#include "hw/ptimer.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
/* Common timer implementation. */
diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
index 5b97e1e1a6..0f21faf876 100644
--- a/hw/timer/digic-timer.c
+++ b/hw/timer/digic-timer.c
@@ -30,6 +30,7 @@
#include "hw/sysbus.h"
#include "hw/ptimer.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#include "hw/timer/digic-timer.h"
diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
index f5836e21f4..eddf3481e8 100644
--- a/hw/timer/imx_epit.c
+++ b/hw/timer/imx_epit.c
@@ -16,6 +16,7 @@
#include "hw/timer/imx_epit.h"
#include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_EPIT
#define DEBUG_IMX_EPIT 0
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index ab2e213a19..3c2f01ab99 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -16,6 +16,7 @@
#include "hw/timer/imx_gpt.h"
#include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_GPT
#define DEBUG_IMX_GPT 0
diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c
index 38e0cb5ad6..dbbeb9b16b 100644
--- a/hw/timer/pl031.c
+++ b/hw/timer/pl031.c
@@ -16,6 +16,7 @@
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
//#define DEBUG_PL031
diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c
index 55dacbbe3b..bf0fb288c4 100644
--- a/hw/timer/stm32f2xx_timer.c
+++ b/hw/timer/stm32f2xx_timer.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/timer/stm32f2xx_timer.h"
+#include "qemu/log.h"
#ifndef STM_TIMER_ERR_DEBUG
#define STM_TIMER_ERR_DEBUG 0
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index f27db36fb3..88154a1f03 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -30,6 +30,9 @@
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
+#ifdef CONFIG_KVM
+#include "linux/kvm.h"
+#endif
#include "trace.h"
struct vfio_group_head vfio_group_list =
diff --git a/hw/watchdog/wdt_diag288.c b/hw/watchdog/wdt_diag288.c
index f54a35a0e3..a7b64e2c40 100644
--- a/hw/watchdog/wdt_diag288.c
+++ b/hw/watchdog/wdt_diag288.c
@@ -16,6 +16,7 @@
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "hw/watchdog/wdt_diag288.h"
+#include "qemu/log.h"
static WatchdogTimerModel model = {
.wdt_name = TYPE_WDT_DIAG288,
diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c
index c835bd0096..ccf65fd8ad 100644
--- a/hw/xtensa/pic_cpu.c
+++ b/hw/xtensa/pic_cpu.c
@@ -26,6 +26,7 @@
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "qemu/log.h"
#include "qemu/timer.h"
diff --git a/include/disas/disas.h b/include/disas/disas.h
index 2b9293b62a..4930d78ac4 100644
--- a/include/disas/disas.h
+++ b/include/disas/disas.h
@@ -4,6 +4,8 @@
#include "qemu-common.h"
#ifdef NEED_CPU_H
+#include "cpu.h"
+
/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size);
void target_disas(FILE *out, CPUState *cpu, target_ulong code,
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 08e5093d0e..3911576431 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -165,6 +165,31 @@ extern unsigned long reserved_va;
#define GUEST_ADDR_MAX (reserved_va ? reserved_va : \
(1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
+#else
+
+#include "exec/hwaddr.h"
+uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
+uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
+uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
+void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
+void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val);
+void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
+void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
+
+uint32_t address_space_lduw(AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
+uint32_t address_space_ldl(AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
+uint64_t address_space_ldq(AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
+void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result);
+void address_space_stw(AddressSpace *as, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result);
+void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val,
+ MemTxAttrs attrs, MemTxResult *result);
+void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#endif
/* page related stuff */
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 9e839e50cd..04eade5b7b 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -7,10 +7,6 @@
#include "exec/hwaddr.h"
#endif
-#ifndef NEED_CPU_H
-#include "exec/poison.h"
-#endif
-
#include "qemu/bswap.h"
#include "qemu/queue.h"
#include "qemu/fprintf-fn.h"
@@ -113,16 +109,6 @@ void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
-#ifdef NEED_CPU_H
-uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
-uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
-uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
-void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
-void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val);
-void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
-void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
-#endif
-
void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
const uint8_t *buf, int len);
void cpu_flush_icache_range(hwaddr start, int len);
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 854e7e3566..5f4e303635 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -23,6 +23,7 @@
#error cpu.h included from common code
#endif
+#include "qemu/host-utils.h"
#include "qemu/queue.h"
#include "tcg-target.h"
#ifndef CONFIG_USER_ONLY
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 85528f9941..b6a4a122da 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -21,6 +21,7 @@
#define _EXEC_ALL_H_
#include "qemu-common.h"
+#include "exec/tb-context.h"
/* allow to see translation results - the slowdown should be negligible, so we leave it */
#define DEBUG_DISAS
@@ -40,30 +41,6 @@ typedef ram_addr_t tb_page_addr_t;
#define DISAS_UPDATE 2 /* cpu state was modified dynamically */
#define DISAS_TB_JUMP 3 /* only pc was modified statically */
-struct TranslationBlock;
-typedef struct TranslationBlock TranslationBlock;
-
-/* XXX: make safe guess about sizes */
-#define MAX_OP_PER_INSTR 266
-
-#if HOST_LONG_BITS == 32
-#define MAX_OPC_PARAM_PER_ARG 2
-#else
-#define MAX_OPC_PARAM_PER_ARG 1
-#endif
-#define MAX_OPC_PARAM_IARGS 5
-#define MAX_OPC_PARAM_OARGS 1
-#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
-
-/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
- * and up to 4 + N parameters on 64-bit archs
- * (N = number of input arguments + output arguments). */
-#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
-#define OPC_BUF_SIZE 640
-#define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
-
-#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)
-
#include "qemu/log.h"
void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
@@ -104,15 +81,6 @@ void cpu_reloading_memory_map(void);
* Note that with KVM only one address space is supported.
*/
void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx);
-/**
- * cpu_get_address_space:
- * @cpu: CPU to get address space from
- * @asidx: index identifying which address space to get
- *
- * Return the requested address space of this CPU. @asidx
- * specifies which address space to read.
- */
-AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
/* cputlb.c */
/**
* tlb_flush_page:
@@ -212,9 +180,6 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...)
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
-#define CODE_GEN_PHYS_HASH_BITS 15
-#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS)
-
/* Estimated block size for TB allocation. */
/* ??? The following is based on a 2015 survey of x86_64 host output.
Better would seem to be some sort of dynamically sized TB array,
@@ -289,23 +254,6 @@ struct TranslationBlock {
uintptr_t jmp_list_first;
};
-#include "qemu/thread.h"
-
-typedef struct TBContext TBContext;
-
-struct TBContext {
-
- TranslationBlock *tbs;
- TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
- int nb_tbs;
- /* any access to the tbs or the page table must use this lock */
- QemuMutex tb_lock;
-
- /* statistics */
- int tb_flush_count;
- int tb_phys_invalidate_count;
-};
-
void tb_free(TranslationBlock *tb);
void tb_flush(CPUState *cpu);
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h
index d9e8cf7715..8e3f8d8176 100644
--- a/include/exec/gdbstub.h
+++ b/include/exec/gdbstub.h
@@ -11,6 +11,8 @@
#define GDB_WATCHPOINT_ACCESS 4
#ifdef NEED_CPU_H
+#include "cpu.h"
+
typedef void (*gdb_syscall_complete_cb)(CPUState *cpu,
target_ulong ret, target_ulong err);
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index ec790432d5..74f8f039d8 100644
--- a/include/exec/helper-head.h
+++ b/include/exec/helper-head.h
@@ -33,17 +33,9 @@
#define dh_alias_s64 i64
#define dh_alias_f32 i32
#define dh_alias_f64 i64
-#ifdef TARGET_LONG_BITS
-# if TARGET_LONG_BITS == 32
-# define dh_alias_tl i32
-# else
-# define dh_alias_tl i64
-# endif
-#endif
#define dh_alias_ptr ptr
#define dh_alias_void void
#define dh_alias_noreturn noreturn
-#define dh_alias_env ptr
#define dh_alias(t) glue(dh_alias_, t)
#define dh_ctype_i32 uint32_t
@@ -53,13 +45,24 @@
#define dh_ctype_s64 int64_t
#define dh_ctype_f32 float32
#define dh_ctype_f64 float64
-#define dh_ctype_tl target_ulong
#define dh_ctype_ptr void *
#define dh_ctype_void void
#define dh_ctype_noreturn void QEMU_NORETURN
-#define dh_ctype_env CPUArchState *
#define dh_ctype(t) dh_ctype_##t
+#ifdef NEED_CPU_H
+# ifdef TARGET_LONG_BITS
+# if TARGET_LONG_BITS == 32
+# define dh_alias_tl i32
+# else
+# define dh_alias_tl i64
+# endif
+# endif
+# define dh_alias_env ptr
+# define dh_ctype_tl target_ulong
+# define dh_ctype_env CPUArchState *
+#endif
+
/* We can't use glue() here because it falls foul of C preprocessor
recursive expansion rules. */
#define dh_retvar_decl0_void void
diff --git a/include/exec/hwaddr.h b/include/exec/hwaddr.h
index c9eb78fba1..bb41588b9d 100644
--- a/include/exec/hwaddr.h
+++ b/include/exec/hwaddr.h
@@ -3,6 +3,8 @@
#ifndef HWADDR_H
#define HWADDR_H
+#include <inttypes.h>
+
#define HWADDR_BITS 64
/* hwaddr is the type of a physical address (its size can
be different from 'target_ulong'). */
diff --git a/include/exec/ioport.h b/include/exec/ioport.h
index 3bd6722627..a298b89ce1 100644
--- a/include/exec/ioport.h
+++ b/include/exec/ioport.h
@@ -24,13 +24,6 @@
#ifndef IOPORT_H
#define IOPORT_H
-#include "qemu-common.h"
-#include "qom/object.h"
-#include "exec/memory.h"
-
-typedef uint32_t pio_addr_t;
-#define FMT_pioaddr PRIx32
-
#define MAX_IOPORTS (64 * 1024)
#define IOPORTS_MASK (MAX_IOPORTS - 1)
@@ -49,12 +42,12 @@ typedef struct MemoryRegionPortio {
extern const MemoryRegionOps unassigned_io_ops;
#endif
-void cpu_outb(pio_addr_t addr, uint8_t val);
-void cpu_outw(pio_addr_t addr, uint16_t val);
-void cpu_outl(pio_addr_t addr, uint32_t val);
-uint8_t cpu_inb(pio_addr_t addr);
-uint16_t cpu_inw(pio_addr_t addr);
-uint32_t cpu_inl(pio_addr_t addr);
+void cpu_outb(uint32_t addr, uint8_t val);
+void cpu_outw(uint32_t addr, uint16_t val);
+void cpu_outl(uint32_t addr, uint32_t val);
+uint8_t cpu_inb(uint32_t addr);
+uint16_t cpu_inw(uint32_t addr);
+uint32_t cpu_inl(uint32_t addr);
typedef struct PortioList {
const struct MemoryRegionPortio *ports;
diff --git a/include/exec/memory.h b/include/exec/memory.h
index e2a3e9953c..7fb9188c0a 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1292,23 +1292,6 @@ void address_space_stq_le(AddressSpace *as, hwaddr addr, uint64_t val,
void address_space_stq_be(AddressSpace *as, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
-#ifdef NEED_CPU_H
-uint32_t address_space_lduw(AddressSpace *as, hwaddr addr,
- MemTxAttrs attrs, MemTxResult *result);
-uint32_t address_space_ldl(AddressSpace *as, hwaddr addr,
- MemTxAttrs attrs, MemTxResult *result);
-uint64_t address_space_ldq(AddressSpace *as, hwaddr addr,
- MemTxAttrs attrs, MemTxResult *result);
-void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val,
- MemTxAttrs attrs, MemTxResult *result);
-void address_space_stw(AddressSpace *as, hwaddr addr, uint32_t val,
- MemTxAttrs attrs, MemTxResult *result);
-void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val,
- MemTxAttrs attrs, MemTxResult *result);
-void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val,
- MemTxAttrs attrs, MemTxResult *result);
-#endif
-
/* address_space_translate: translate an address range into an address space
* into a MemoryRegion and an address range into that section. Should be
* called from an RCU critical section, to avoid that the last reference
diff --git a/include/exec/poison.h b/include/exec/poison.h
index a4b1eca24f..3ca7929cce 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -37,14 +37,6 @@
#pragma GCC poison CPUArchState
-#pragma GCC poison lduw_phys
-#pragma GCC poison ldl_phys
-#pragma GCC poison ldq_phys
-#pragma GCC poison stl_phys_notdirty
-#pragma GCC poison stw_phys
-#pragma GCC poison stl_phys
-#pragma GCC poison stq_phys
-
#pragma GCC poison CPU_INTERRUPT_HARD
#pragma GCC poison CPU_INTERRUPT_EXITTB
#pragma GCC poison CPU_INTERRUPT_HALT
diff --git a/include/exec/tb-context.h b/include/exec/tb-context.h
new file mode 100644
index 0000000000..5efe3d9087
--- /dev/null
+++ b/include/exec/tb-context.h
@@ -0,0 +1,44 @@
+/*
+ * Internal structs that QEMU exports to TCG
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef QEMU_TB_CONTEXT_H_
+#define QEMU_TB_CONTEXT_H_
+
+#include "qemu/thread.h"
+
+#define CODE_GEN_PHYS_HASH_BITS 15
+#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS)
+
+typedef struct TranslationBlock TranslationBlock;
+typedef struct TBContext TBContext;
+
+struct TBContext {
+
+ TranslationBlock *tbs;
+ TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
+ int nb_tbs;
+ /* any access to the tbs or the page table must use this lock */
+ QemuMutex tb_lock;
+
+ /* statistics */
+ int tb_flush_count;
+ int tb_phys_invalidate_count;
+};
+
+#endif
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index e0978c8b92..dc6ee00885 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -150,13 +150,6 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
MemoryRegion *parent);
void acpi_pm_tmr_reset(ACPIREGS *ar);
-#include "qemu/timer.h"
-static inline int64_t acpi_pm_tmr_get_clock(void)
-{
- return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
- NANOSECONDS_PER_SECOND);
-}
-
/* PM1a_EVT: piix and ich9 don't implement PM1b. */
uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
void acpi_pm1_evt_power_down(ACPIREGS *ar);
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index b2517f9a43..8b49a9833f 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -12,9 +12,9 @@
#define ARM_MISC_H 1
#include "exec/memory.h"
+#include "target-arm/cpu-qom.h"
#include "hw/irq.h"
#include "qemu/notify.h"
-#include "cpu.h"
typedef enum {
ARM_ENDIANNESS_UNKNOWN = 0,
diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h
index a739d6ae65..63785baaa8 100644
--- a/include/hw/arm/digic.h
+++ b/include/hw/arm/digic.h
@@ -19,7 +19,6 @@
#define HW_ARM_DIGIC_H
#include "cpu.h"
-
#include "hw/timer/digic-timer.h"
#include "hw/char/digic-uart.h"
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h
index 5c1820f883..b6d929ddb7 100644
--- a/include/hw/arm/exynos4210.h
+++ b/include/hw/arm/exynos4210.h
@@ -28,6 +28,7 @@
#include "qemu-common.h"
#include "exec/memory.h"
+#include "target-arm/cpu-qom.h"
#define EXYNOS4210_NCPUS 2
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index d24aaee1c1..e9157ea4b3 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -29,6 +29,7 @@
#include "hw/sd/sdhci.h"
#include "hw/ssi/imx_spi.h"
#include "exec/memory.h"
+#include "cpu.h"
#define TYPE_FSL_IMX6 "fsl,imx6"
#define FSL_IMX6(obj) OBJECT_CHECK(FslIMX6State, (obj), TYPE_FSL_IMX6)
diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h
index 0ad5fb883c..f026c8df57 100644
--- a/include/hw/arm/omap.h
+++ b/include/hw/arm/omap.h
@@ -20,6 +20,7 @@
#include "exec/memory.h"
# define hw_omap_h "omap.h"
#include "hw/irq.h"
+#include "target-arm/cpu-qom.h"
# define OMAP_EMIFS_BASE 0x00000000
# define OMAP2_Q0_BASE 0x00000000
diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h
index 259b852495..074feacd03 100644
--- a/include/hw/arm/pxa.h
+++ b/include/hw/arm/pxa.h
@@ -10,6 +10,7 @@
# define PXA_H "pxa.h"
#include "exec/memory.h"
+#include "target-arm/cpu-qom.h"
/* Interrupt numbers */
# define PXA2XX_PIC_SSP3 0
diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h
index 7d3700ebf6..e43330ad65 100644
--- a/include/hw/arm/virt-acpi-build.h
+++ b/include/hw/arm/virt-acpi-build.h
@@ -22,6 +22,7 @@
#include "qemu-common.h"
#include "hw/arm/virt.h"
+#include "qemu/notify.h"
#define ACPI_GICC_ENABLED 1
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ecd8589603..82703d2ecd 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -31,6 +31,7 @@
#define QEMU_ARM_VIRT_H
#include "qemu-common.h"
+#include "exec/hwaddr.h"
#define NUM_GICV2M_SPIS 64
#define NUM_VIRTIO_TRANSPORTS 32
diff --git a/include/hw/hw.h b/include/hw/hw.h
index 2cb69d5f5b..3669ebd916 100644
--- a/include/hw/hw.h
+++ b/include/hw/hw.h
@@ -2,40 +2,17 @@
#ifndef QEMU_HW_H
#define QEMU_HW_H
+#ifdef CONFIG_USER_ONLY
+#error Cannot include hw/hw.h from user emulation
+#endif
-#if !defined(CONFIG_USER_ONLY) && !defined(NEED_CPU_H)
#include "exec/cpu-common.h"
-#endif
-
-#include "exec/ioport.h"
+#include "qom/object.h"
+#include "exec/memory.h"
#include "hw/irq.h"
-#include "block/aio.h"
#include "migration/vmstate.h"
-#include "qemu/log.h"
#include "qemu/module.h"
-#ifdef NEED_CPU_H
-#if TARGET_LONG_BITS == 64
-#define qemu_put_betl qemu_put_be64
-#define qemu_get_betl qemu_get_be64
-#define qemu_put_betls qemu_put_be64s
-#define qemu_get_betls qemu_get_be64s
-#define qemu_put_sbetl qemu_put_sbe64
-#define qemu_get_sbetl qemu_get_sbe64
-#define qemu_put_sbetls qemu_put_sbe64s
-#define qemu_get_sbetls qemu_get_sbe64s
-#else
-#define qemu_put_betl qemu_put_be32
-#define qemu_get_betl qemu_get_be32
-#define qemu_put_betls qemu_put_be32s
-#define qemu_get_betls qemu_get_be32s
-#define qemu_put_sbetl qemu_put_sbe32
-#define qemu_get_sbetl qemu_get_sbe32
-#define qemu_put_sbetls qemu_put_sbe32s
-#define qemu_get_sbetls qemu_get_sbe32s
-#endif
-#endif
-
typedef void QEMUResetHandler(void *opaque);
void qemu_register_reset(QEMUResetHandler *func, void *opaque);
@@ -43,31 +20,4 @@ void qemu_unregister_reset(QEMUResetHandler *func, void *opaque);
void QEMU_NORETURN hw_error(const char *fmt, ...) GCC_FMT_ATTR(1, 2);
-#ifdef NEED_CPU_H
-#if TARGET_LONG_BITS == 64
-#define VMSTATE_UINTTL_V(_f, _s, _v) \
- VMSTATE_UINT64_V(_f, _s, _v)
-#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \
- VMSTATE_UINT64_EQUAL_V(_f, _s, _v)
-#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \
- VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)
-#define vmstate_info_uinttl vmstate_info_uint64
-#else
-#define VMSTATE_UINTTL_V(_f, _s, _v) \
- VMSTATE_UINT32_V(_f, _s, _v)
-#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \
- VMSTATE_UINT32_EQUAL_V(_f, _s, _v)
-#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \
- VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v)
-#define vmstate_info_uinttl vmstate_info_uint32
-#endif
-#define VMSTATE_UINTTL(_f, _s) \
- VMSTATE_UINTTL_V(_f, _s, 0)
-#define VMSTATE_UINTTL_EQUAL(_f, _s) \
- VMSTATE_UINTTL_EQUAL_V(_f, _s, 0)
-#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \
- VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0)
-
-#endif
-
#endif
diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h
index 51eb6d3884..ea48ea9389 100644
--- a/include/hw/i386/apic.h
+++ b/include/hw/i386/apic.h
@@ -18,15 +18,10 @@ void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
uint8_t cpu_get_apic_tpr(DeviceState *s);
void apic_init_reset(DeviceState *s);
void apic_sipi(DeviceState *s);
-void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
- TPRAccess access);
void apic_poll_irq(DeviceState *d);
void apic_designate_bsp(DeviceState *d, bool bsp);
/* pc.c */
DeviceState *cpu_get_current_apic(void);
-/* cpu.c */
-bool cpu_is_bsp(X86CPU *cpu);
-
#endif
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index ffb2ea7cdf..c87fbad47a 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -3,8 +3,8 @@
/* ISA bus */
-#include "exec/ioport.h"
#include "exec/memory.h"
+#include "exec/ioport.h"
#include "hw/qdev.h"
#define ISA_NUM_IRQS 16
diff --git a/include/hw/m68k/mcf.h b/include/hw/m68k/mcf.h
index fbc8dc26df..0f0d2288e6 100644
--- a/include/hw/m68k/mcf.h
+++ b/include/hw/m68k/mcf.h
@@ -2,6 +2,8 @@
#define HW_MCF_H
/* Motorola ColdFire device prototypes. */
+#include "target-m68k/cpu-qom.h"
+
struct MemoryRegion;
/* mcf_uart.c */
diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
index b2626f2922..8673daa39d 100644
--- a/include/hw/mips/cpudevs.h
+++ b/include/hw/mips/cpudevs.h
@@ -1,5 +1,8 @@
#ifndef HW_MIPS_CPUDEVS_H
#define HW_MIPS_CPUDEVS_H
+
+#include "target-mips/cpu-qom.h"
+
/* Definitions for MIPS CPU internal devices. */
/* mips_addr.c */
@@ -9,9 +12,9 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
/* mips_int.c */
-void cpu_mips_irq_init_cpu(CPUMIPSState *env);
+void cpu_mips_irq_init_cpu(MIPSCPU *cpu);
/* mips_timer.c */
-void cpu_mips_clock_init(CPUMIPSState *);
+void cpu_mips_clock_init(MIPSCPU *cpu);
#endif
diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h
index ee67098cbc..afe950b409 100644
--- a/include/hw/ppc/openpic.h
+++ b/include/hw/ppc/openpic.h
@@ -2,7 +2,8 @@
#define __OPENPIC_H__
#include "qemu-common.h"
-#include "hw/qdev.h"
+#include "hw/qdev-core.h"
+#include "qom/cpu.h"
#define TYPE_OPENPIC "openpic"
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index 14efd0ca31..5617dc4a2c 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -1,6 +1,8 @@
#ifndef HW_PPC_H
#define HW_PPC_H 1
+#include "target-ppc/cpu-qom.h"
+
void ppc_set_irq(PowerPCCPU *cpu, int n_IRQ, int level);
/* PowerPC hardware exceptions management helpers */
@@ -64,17 +66,21 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,
void ppc40x_core_reset(PowerPCCPU *cpu);
void ppc40x_chip_reset(PowerPCCPU *cpu);
void ppc40x_system_reset(PowerPCCPU *cpu);
-void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
-
-extern CPUWriteMemoryFunc * const PPC_io_write[];
-extern CPUReadMemoryFunc * const PPC_io_read[];
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
-void ppc40x_irq_init (CPUPPCState *env);
-void ppce500_irq_init (CPUPPCState *env);
-void ppc6xx_irq_init (CPUPPCState *env);
-void ppc970_irq_init (CPUPPCState *env);
-void ppcPOWER7_irq_init (CPUPPCState *env);
+#if defined(CONFIG_USER_ONLY)
+static inline void ppc40x_irq_init(PowerPCCPU *cpu) {}
+static inline void ppc6xx_irq_init(PowerPCCPU *cpu) {}
+static inline void ppc970_irq_init(PowerPCCPU *cpu) {}
+static inline void ppcPOWER7_irq_init(PowerPCCPU *cpu) {}
+static inline void ppce500_irq_init(PowerPCCPU *cpu) {}
+#else
+void ppc40x_irq_init(PowerPCCPU *cpu);
+void ppce500_irq_init(PowerPCCPU *cpu);
+void ppc6xx_irq_init(PowerPCCPU *cpu);
+void ppc970_irq_init(PowerPCCPU *cpu);
+void ppcPOWER7_irq_init(PowerPCCPU *cpu);
+#endif
/* PPC machines for OpenBIOS */
enum {
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index c9733e7552..5f8b0422f1 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -61,7 +61,7 @@ struct VIOsPAPRDevice {
DeviceState qdev;
uint32_t reg;
uint32_t irq;
- target_ulong signal_state;
+ uint64_t signal_state;
VIOsPAPR_CRQ crq;
AddressSpace as;
MemoryRegion mrroot;
diff --git a/hw/s390x/css.h b/include/hw/s390x/css.h
similarity index 76%
rename from hw/s390x/css.h
rename to include/hw/s390x/css.h
index a320eea59c..98b2e2cc79 100644
--- a/hw/s390x/css.h
+++ b/include/hw/s390x/css.h
@@ -14,7 +14,7 @@
#include "hw/s390x/adapter.h"
#include "hw/s390x/s390_flic.h"
-#include "ioinst.h"
+#include "hw/s390x/ioinst.h"
/* Channel subsystem constants. */
#define MAX_SCHID 65535
@@ -67,6 +67,7 @@ typedef struct CMBE {
uint32_t reserved[7];
} QEMU_PACKED CMBE;
+typedef struct SubchDev SubchDev;
struct SubchDev {
/* channel-subsystem related things: */
uint8_t cssid;
@@ -123,4 +124,32 @@ void css_adapter_interrupt(uint8_t isc);
#define CSS_IO_ADAPTER_VIRTIO 1
int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap,
bool maskable, uint32_t *id);
+
+#ifndef CONFIG_USER_ONLY
+SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
+ uint16_t schid);
+bool css_subch_visible(SubchDev *sch);
+void css_conditional_io_interrupt(SubchDev *sch);
+int css_do_stsch(SubchDev *sch, SCHIB *schib);
+bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);
+int css_do_msch(SubchDev *sch, const SCHIB *schib);
+int css_do_xsch(SubchDev *sch);
+int css_do_csch(SubchDev *sch);
+int css_do_hsch(SubchDev *sch);
+int css_do_ssch(SubchDev *sch, ORB *orb);
+int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len);
+void css_do_tsch_update_subch(SubchDev *sch);
+int css_do_stcrw(CRW *crw);
+void css_undo_stcrw(CRW *crw);
+int css_do_tpi(IOIntCode *int_code, int lowcore);
+int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
+ int rfmt, void *buf);
+void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo);
+int css_enable_mcsse(void);
+int css_enable_mss(void);
+int css_do_rsch(SubchDev *sch);
+int css_do_rchp(uint8_t cssid, uint8_t chpid);
+bool css_present(uint8_t cssid);
+#endif
+
#endif
diff --git a/target-s390x/ioinst.h b/include/hw/s390x/ioinst.h
similarity index 87%
rename from target-s390x/ioinst.h
rename to include/hw/s390x/ioinst.h
index 013cc91487..12d44c8a02 100644
--- a/target-s390x/ioinst.h
+++ b/include/hw/s390x/ioinst.h
@@ -11,6 +11,7 @@
#ifndef IOINST_S390X_H
#define IOINST_S390X_H
+
/*
* Channel I/O related definitions, as defined in the Principles
* Of Operation (and taken from the Linux implementation).
@@ -227,20 +228,5 @@ typedef struct IOIntCode {
int ioinst_disassemble_sch_ident(uint32_t value, int *m, int *cssid, int *ssid,
int *schid);
-void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1);
-void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1);
-void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1);
-void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
-void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
-void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb);
-void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
-int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
-void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb);
-int ioinst_handle_tpi(S390CPU *cpu, uint32_t ipb);
-void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2,
- uint32_t ipb);
-void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1);
-void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1);
-void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1);
#endif
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index d5d273a449..c8a4b98d5d 100644
--- a/include/hw/sd/sd.h
+++ b/include/hw/sd/sd.h
@@ -29,6 +29,8 @@
#ifndef __hw_sd_h
#define __hw_sd_h 1
+#include "hw/qdev.h"
+
#define OUT_OF_RANGE (1 << 31)
#define ADDRESS_ERROR (1 << 30)
#define BLOCK_LEN_ERROR (1 << 29)
diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index e61de9acc6..070312d921 100644
--- a/include/hw/sh4/sh.h
+++ b/include/hw/sh4/sh.h
@@ -3,6 +3,7 @@
/* Definitions for SH board emulation. */
#include "hw/sh4/sh_intc.h"
+#include "target-sh4/cpu-qom.h"
#define A7ADDR(x) ((x) & 0x1fffffff)
#define P4ADDR(x) ((x) | 0xe0000000)
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index cc1dba49bf..a4959378d4 100644
--- a/include/hw/sysbus.h
+++ b/include/hw/sysbus.h
@@ -72,7 +72,7 @@ struct SysBusDevice {
MemoryRegion *memory;
} mmio[QDEV_MAX_MMIO];
int num_pio;
- pio_addr_t pio[QDEV_MAX_PIO];
+ uint32_t pio[QDEV_MAX_PIO];
};
typedef int FindSysbusDeviceFunc(SysBusDevice *sbdev, void *opaque);
@@ -81,7 +81,7 @@ void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory);
MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n);
void sysbus_init_irq(SysBusDevice *dev, qemu_irq *p);
void sysbus_pass_irq(SysBusDevice *dev, SysBusDevice *target);
-void sysbus_init_ioports(SysBusDevice *dev, pio_addr_t ioport, pio_addr_t size);
+void sysbus_init_ioports(SysBusDevice *dev, uint32_t ioport, uint32_t size);
bool sysbus_has_irq(SysBusDevice *dev, int n);
diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h
index 6eb815aace..6365483473 100644
--- a/include/hw/xen/xen.h
+++ b/include/hw/xen/xen.h
@@ -7,8 +7,10 @@
* /usr/include/xen, so it can be included unconditionally.
*/
-#include "hw/irq.h"
#include "qemu-common.h"
+#include "qemu/typedefs.h"
+#include "exec/cpu-common.h"
+#include "hw/irq.h"
/* xen-machine.c */
enum xen_mode {
@@ -37,12 +39,11 @@ qemu_irq *xen_interrupt_controller_init(void);
void xenstore_store_pv_console_info(int i, struct CharDriverState *chr);
-#if defined(NEED_CPU_H) && !defined(CONFIG_USER_ONLY)
void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory);
+
void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size,
struct MemoryRegion *mr, Error **errp);
void xen_modified_memory(ram_addr_t start, ram_addr_t length);
-#endif
void xen_register_framebuffer(struct MemoryRegion *mr);
diff --git a/include/migration/cpu.h b/include/migration/cpu.h
new file mode 100644
index 0000000000..f3abbab650
--- /dev/null
+++ b/include/migration/cpu.h
@@ -0,0 +1,48 @@
+/* Declarations for use for CPU state serialization. */
+#ifndef MIGRATION_CPU_H
+#define MIGRATION_CPU_H
+
+#if TARGET_LONG_BITS == 64
+#define qemu_put_betl qemu_put_be64
+#define qemu_get_betl qemu_get_be64
+#define qemu_put_betls qemu_put_be64s
+#define qemu_get_betls qemu_get_be64s
+#define qemu_put_sbetl qemu_put_sbe64
+#define qemu_get_sbetl qemu_get_sbe64
+#define qemu_put_sbetls qemu_put_sbe64s
+#define qemu_get_sbetls qemu_get_sbe64s
+
+#define VMSTATE_UINTTL_V(_f, _s, _v) \
+ VMSTATE_UINT64_V(_f, _s, _v)
+#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \
+ VMSTATE_UINT64_EQUAL_V(_f, _s, _v)
+#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \
+ VMSTATE_UINT64_ARRAY_V(_f, _s, _n, _v)
+#define vmstate_info_uinttl vmstate_info_uint64
+#else
+#define qemu_put_betl qemu_put_be32
+#define qemu_get_betl qemu_get_be32
+#define qemu_put_betls qemu_put_be32s
+#define qemu_get_betls qemu_get_be32s
+#define qemu_put_sbetl qemu_put_sbe32
+#define qemu_get_sbetl qemu_get_sbe32
+#define qemu_put_sbetls qemu_put_sbe32s
+#define qemu_get_sbetls qemu_get_sbe32s
+
+#define VMSTATE_UINTTL_V(_f, _s, _v) \
+ VMSTATE_UINT32_V(_f, _s, _v)
+#define VMSTATE_UINTTL_EQUAL_V(_f, _s, _v) \
+ VMSTATE_UINT32_EQUAL_V(_f, _s, _v)
+#define VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, _v) \
+ VMSTATE_UINT32_ARRAY_V(_f, _s, _n, _v)
+#define vmstate_info_uinttl vmstate_info_uint32
+#endif
+
+#define VMSTATE_UINTTL(_f, _s) \
+ VMSTATE_UINTTL_V(_f, _s, 0)
+#define VMSTATE_UINTTL_EQUAL(_f, _s) \
+ VMSTATE_UINTTL_EQUAL_V(_f, _s, 0)
+#define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \
+ VMSTATE_UINTTL_ARRAY_V(_f, _s, _n, 0)
+
+#endif
diff --git a/include/qemu-common.h b/include/qemu-common.h
index 163bcbb861..835cbc68b8 100644
--- a/include/qemu-common.h
+++ b/include/qemu-common.h
@@ -21,25 +21,6 @@
#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
#include "qemu/option.h"
-#include "qemu/host-utils.h"
-
-void cpu_ticks_init(void);
-
-/* icount */
-void configure_icount(QemuOpts *opts, Error **errp);
-extern int use_icount;
-extern int icount_align_option;
-/* drift information for info jit command */
-extern int64_t max_delay;
-extern int64_t max_advance;
-void dump_drift_info(FILE *f, fprintf_function cpu_fprintf);
-
-#include "qemu/bswap.h"
-
-/* FIXME: Remove NEED_CPU_H. */
-#ifdef NEED_CPU_H
-#include "cpu.h"
-#endif /* !defined(NEED_CPU_H) */
/* main function, renamed */
#if defined(CONFIG_COCOA)
@@ -100,19 +81,6 @@ bool tcg_enabled(void);
void cpu_exec_init_all(void);
-/* Unblock cpu */
-void qemu_cpu_kick_self(void);
-
-/* work queue */
-struct qemu_work_item {
- struct qemu_work_item *next;
- void (*func)(void *data);
- void *data;
- int done;
- bool free;
-};
-
-
/**
* Sends a (part of) iovec down a socket, yielding when the socket is full, or
* Receives data into a (part of) iovec from a socket,
diff --git a/include/qemu/log.h b/include/qemu/log.h
index c52f136ac1..234fa81153 100644
--- a/include/qemu/log.h
+++ b/include/qemu/log.h
@@ -104,21 +104,8 @@ typedef struct QEMULogItem {
extern const QEMULogItem qemu_log_items[];
-/* This is the function that actually does the work of
- * changing the log level; it should only be accessed via
- * the qemu_set_log() wrapper.
- */
-void do_qemu_set_log(int log_flags, bool use_own_buffers);
-
-static inline void qemu_set_log(int log_flags)
-{
-#ifdef CONFIG_USER_ONLY
- do_qemu_set_log(log_flags, true);
-#else
- do_qemu_set_log(log_flags, false);
-#endif
-}
-
+void qemu_set_log(int log_flags);
+void qemu_log_needs_buffers(void);
void qemu_set_log_filename(const char *filename);
void qemu_set_dfilter_ranges(const char *ranges);
bool qemu_log_in_addr_range(uint64_t addr);
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 2e930a92ce..268ec66958 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -30,6 +30,8 @@
#include "config-host.h"
#ifdef NEED_CPU_H
#include "config-target.h"
+#else
+#include "exec/poison.h"
#endif
#include "qemu/compiler.h"
diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 471969a24d..309f3d09e9 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -4,6 +4,7 @@
#include "qemu-common.h"
#include "qemu/notify.h"
#include "qemu/host-utils.h"
+#include "sysemu/cpus.h"
#define NANOSECONDS_PER_SECOND 1000000000LL
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 4349c465c5..c9ba16ca82 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -222,6 +222,15 @@ struct kvm_run;
#define TB_JMP_CACHE_BITS 12
#define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
+/* work queue */
+struct qemu_work_item {
+ struct qemu_work_item *next;
+ void (*func)(void *data);
+ void *data;
+ int done;
+ bool free;
+};
+
/**
* CPUState:
* @cpu_index: CPU index (informative).
@@ -815,6 +824,16 @@ int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
+/**
+ * cpu_get_address_space:
+ * @cpu: CPU to get address space from
+ * @asidx: index identifying which address space to get
+ *
+ * Return the requested address space of this CPU. @asidx
+ * specifies which address space to read.
+ */
+AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
+
void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);
void cpu_exec_exit(CPUState *cpu);
diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h
index 3d1e5ba1e1..fe992a8946 100644
--- a/include/sysemu/cpus.h
+++ b/include/sysemu/cpus.h
@@ -7,6 +7,19 @@ void qemu_init_cpu_loop(void);
void resume_all_vcpus(void);
void pause_all_vcpus(void);
void cpu_stop_current(void);
+void cpu_ticks_init(void);
+
+void configure_icount(QemuOpts *opts, Error **errp);
+extern int use_icount;
+extern int icount_align_option;
+
+/* drift information for info jit command */
+extern int64_t max_delay;
+extern int64_t max_advance;
+void dump_drift_info(FILE *f, fprintf_function cpu_fprintf);
+
+/* Unblock cpu */
+void qemu_cpu_kick_self(void);
void cpu_synchronize_all_states(void);
void cpu_synchronize_all_post_reset(void);
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 0f7cd4d3ce..d6e96a4298 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -15,7 +15,6 @@
#include "hw/hw.h"
#include "block/block.h"
#include "block/accounting.h"
-#include "sysemu/kvm.h"
typedef struct ScatterGatherEntry ScatterGatherEntry;
@@ -67,9 +66,7 @@ static inline void dma_barrier(AddressSpace *as, DMADirection dir)
* use lighter barriers based on the direction of the
* transfer, the DMA context, etc...
*/
- if (kvm_enabled()) {
- smp_mb();
- }
+ smp_mb();
}
/* Checks that the given range of addresses is valid for DMA. This is
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 0e18f15c94..f9f00e2e56 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -218,6 +218,7 @@ int kvm_init_vcpu(CPUState *cpu);
int kvm_cpu_exec(CPUState *cpu);
#ifdef NEED_CPU_H
+#include "cpu.h"
void kvm_setup_guest_memory(void *start, size_t size);
void kvm_flush_coalesced_mmio_buffer(void);
diff --git a/io/channel-websock.c b/io/channel-websock.c
index 708178779e..239c75a979 100644
--- a/io/channel-websock.c
+++ b/io/channel-websock.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/bswap.h"
#include "io/channel-websock.h"
#include "crypto/hash.h"
#include "trace.h"
diff --git a/ioport.c b/ioport.c
index 7a84d5444e..94e08ab657 100644
--- a/ioport.c
+++ b/ioport.c
@@ -26,6 +26,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "exec/ioport.h"
#include "trace.h"
#include "exec/memory.h"
@@ -53,14 +55,14 @@ const MemoryRegionOps unassigned_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-void cpu_outb(pio_addr_t addr, uint8_t val)
+void cpu_outb(uint32_t addr, uint8_t val)
{
trace_cpu_out(addr, 'b', val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
&val, 1);
}
-void cpu_outw(pio_addr_t addr, uint16_t val)
+void cpu_outw(uint32_t addr, uint16_t val)
{
uint8_t buf[2];
@@ -70,7 +72,7 @@ void cpu_outw(pio_addr_t addr, uint16_t val)
buf, 2);
}
-void cpu_outl(pio_addr_t addr, uint32_t val)
+void cpu_outl(uint32_t addr, uint32_t val)
{
uint8_t buf[4];
@@ -80,7 +82,7 @@ void cpu_outl(pio_addr_t addr, uint32_t val)
buf, 4);
}
-uint8_t cpu_inb(pio_addr_t addr)
+uint8_t cpu_inb(uint32_t addr)
{
uint8_t val;
@@ -90,7 +92,7 @@ uint8_t cpu_inb(pio_addr_t addr)
return val;
}
-uint16_t cpu_inw(pio_addr_t addr)
+uint16_t cpu_inw(uint32_t addr)
{
uint8_t buf[2];
uint16_t val;
@@ -101,7 +103,7 @@ uint16_t cpu_inw(pio_addr_t addr)
return val;
}
-uint32_t cpu_inl(pio_addr_t addr)
+uint32_t cpu_inl(uint32_t addr)
{
uint8_t buf[4];
uint32_t val;
diff --git a/kvm-stub.c b/kvm-stub.c
index b962b24831..63735a872a 100644
--- a/kvm-stub.c
+++ b/kvm-stub.c
@@ -12,7 +12,6 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
-#include "hw/hw.h"
#include "cpu.h"
#include "sysemu/kvm.h"
diff --git a/linux-user/main.c b/linux-user/main.c
index 5f3ec9747a..ba38aed431 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -26,6 +26,7 @@
#include "qemu/cutils.h"
#include "qemu/help_option.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#include "qemu/timer.h"
#include "qemu/envlist.h"
@@ -3760,6 +3761,7 @@ static void handle_arg_log(const char *arg)
qemu_print_log_usage(stdout);
exit(EXIT_FAILURE);
}
+ qemu_log_needs_buffers();
qemu_set_log(mask);
}
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
index 26b0ba2736..208c63eb2a 100644
--- a/linux-user/qemu.h
+++ b/linux-user/qemu.h
@@ -3,6 +3,7 @@
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#undef DEBUG_REMAP
diff --git a/memory.c b/memory.c
index f76f85df95..a8ef85261f 100644
--- a/memory.c
+++ b/memory.c
@@ -15,6 +15,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "exec/memory.h"
#include "exec/address-spaces.h"
#include "exec/ioport.h"
diff --git a/migration/ram.c b/migration/ram.c
index 88fbffcce4..5e88080faf 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -26,6 +26,8 @@
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include <zlib.h>
#include "qapi-event.h"
#include "qemu/cutils.h"
diff --git a/migration/savevm.c b/migration/savevm.c
index 16ba443798..bfb3d9178f 100644
--- a/migration/savevm.c
+++ b/migration/savevm.c
@@ -27,6 +27,7 @@
*/
#include "qemu/osdep.h"
+#include "cpu.h"
#include "hw/boards.h"
#include "hw/hw.h"
#include "hw/qdev.h"
diff --git a/monitor.c b/monitor.c
index d1c193013e..0129936fbe 100644
--- a/monitor.c
+++ b/monitor.c
@@ -23,6 +23,8 @@
*/
#include "qemu/osdep.h"
#include <dirent.h>
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "monitor/qdev.h"
#include "hw/usb.h"
@@ -69,6 +71,8 @@
#include "trace/simple.h"
#endif
#include "exec/memory.h"
+#include "exec/exec-all.h"
+#include "qemu/log.h"
#include "qmp-commands.h"
#include "hmp.h"
#include "qemu/thread.h"
diff --git a/nbd/nbd-internal.h b/nbd/nbd-internal.h
index 379153561d..26a9f4d9fd 100644
--- a/nbd/nbd-internal.h
+++ b/nbd/nbd-internal.h
@@ -27,6 +27,7 @@
#include <linux/fs.h>
#endif
+#include "qemu/bswap.h"
#include "qemu/queue.h"
#include "qemu/main-loop.h"
diff --git a/page_cache.c b/page_cache.c
index cb8a69e964..37a66e497b 100644
--- a/page_cache.c
+++ b/page_cache.c
@@ -16,6 +16,7 @@
#include <glib.h>
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include "migration/page_cache.h"
#ifdef DEBUG_CACHE
diff --git a/qemu-nbd.c b/qemu-nbd.c
index 3e541131f4..d59b187780 100644
--- a/qemu-nbd.c
+++ b/qemu-nbd.c
@@ -26,6 +26,7 @@
#include "qemu/main-loop.h"
#include "qemu/error-report.h"
#include "qemu/config-file.h"
+#include "qemu/bswap.h"
#include "block/snapshot.h"
#include "qapi/util.h"
#include "qapi/qmp/qstring.h"
diff --git a/qtest.c b/qtest.c
index 87575bc0b4..da4826c69f 100644
--- a/qtest.c
+++ b/qtest.c
@@ -13,6 +13,8 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "sysemu/qtest.h"
#include "hw/qdev.h"
#include "sysemu/char.h"
diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions
new file mode 100644
index 0000000000..a8108d9b88
--- /dev/null
+++ b/scripts/analyze-inclusions
@@ -0,0 +1,102 @@
+#! /bin/sh
+#
+# Copyright (C) 2016 Red Hat, Inc.
+#
+# Author: Paolo Bonzini <pbonzini@redhat.com>
+#
+# Print statistics about header file inclusions.
+#
+# The script has two modes of execution:
+#
+# 1) if invoked with a path on the command line (possibly
+# preceded by a "--" argument), it will run the analysis on
+# an existing build directory
+#
+# 2) otherwise, it will configure and builds QEMU itself in a
+# "+build" subdirectory which is left around when the script
+# exits. In this case the command line is passed directly to
+# "make" (typically used for a "-j" argument suitable for your
+# system).
+#
+# Inspired by a post by Markus Armbruster.
+
+case "x$1" in
+x--)
+ shift
+ cd "$1" || exit $?
+ ;;
+x-* | x)
+ mkdir -p +build
+ cd +build
+ test -f Makefile && make distclean
+ ../configure
+ make "$@"
+ ;;
+*)
+ cd "$1" || exit $?
+esac
+
+QEMU_CFLAGS=$(sed -n s/^QEMU_CFLAGS=//p config-host.mak)
+QEMU_INCLUDES=$(sed -n s/^QEMU_INCLUDES=//p config-host.mak | \
+ sed 's/$(SRC_PATH)/../g' )
+CFLAGS=$(sed -n s/^CFLAGS=//p config-host.mak)
+
+grep_include() {
+ find . -name "*.d" -exec grep -l "$@" {} + | wc -l
+}
+
+echo Found $(find . -name "*.d" | wc -l) object files
+echo $(grep_include -F 'include/qemu-common.h') files include qemu-common.h
+echo $(grep_include -F 'hw/hw.h') files include hw/hw.h
+echo $(grep_include 'target-[a-z0-9]*/cpu\.h') files include cpu.h
+echo $(grep_include -F 'qapi-types.h') files include qapi-types.h
+echo $(grep_include -F 'trace/generated-tracers.h') files include generated-tracers.h
+echo $(grep_include -F 'qapi/error.h') files include qapi/error.h
+echo $(grep_include -F 'qom/object.h') files include qom/object.h
+echo $(grep_include -F 'block/aio.h') files include block/aio.h
+echo $(grep_include -F 'exec/memory.h') files include exec/memory.h
+echo $(grep_include -F 'fpu/softfloat.h') files include fpu/softfloat.h
+echo $(grep_include -F 'qemu/bswap.h') files include qemu/bswap.h
+echo
+
+awk1='
+ /^# / { file = $3;next }
+ NR>1 { bytes[file]+=length()+1; lines[file]++ }
+ END { for(i in lines) print i,lines[i],bytes[i] }'
+
+awk2='
+ {tot_l+=$2;tot_b+=$3;tot_f++}
+ /\/usr.*\/glib/ {glib_l+=$2;glib_b+=$3;glib_f++;next}
+ /\/usr/ {sys_l+=$2;sys_b+=$3;sys_f++;next}
+ {qemu_l+=$2;qemu_b+=$3;qemu_f++;next}
+ END {
+ printf "%s\t %s\t %s\t %s\n", "lines", "bytes", "files", "source"
+ printf "%s\t %s\t %s\t %s\n", qemu_l, qemu_b, qemu_f, "QEMU"
+ printf "%s\t %s\t %s\t %s\n", sys_l, sys_b, sys_f, "system"
+ printf "%s\t %s\t %s\t %s\n", glib_l, glib_b, glib_f, "glib"
+ printf "%s\t %s\t %s\t %s\n", tot_l, tot_b, tot_f, "total"
+ }'
+
+analyze() {
+ cc $QEMU_CFLAGS $QEMU_INCLUDES $CFLAGS -E -o - "$@" | \
+ awk "$awk1" | awk "$awk2"
+ echo
+}
+
+echo osdep.h:
+analyze ../include/qemu/osdep.h
+
+echo qemu-common.h:
+analyze -include ../include/qemu/osdep.h ../include/qemu-common.h
+
+echo hw/hw.h:
+analyze -include ../include/qemu/osdep.h ../include/hw/hw.h
+
+echo trace/generated-tracers.h:
+analyze -include ../include/qemu/osdep.h trace/generated-tracers.h
+
+echo target-i386/cpu.h:
+analyze -DNEED_CPU_H -I../target-i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target-i386/cpu.h
+
+echo hw/hw.h + NEED_CPU_H:
+analyze -DNEED_CPU_H -I../target-i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h
diff --git a/scripts/create_config b/scripts/create_config
index 9cb176f1ba..b2d2ebb452 100755
--- a/scripts/create_config
+++ b/scripts/create_config
@@ -52,7 +52,7 @@ case $line in
done
echo " NULL"
;;
- CONFIG_*=y) # configuration
+ CONFIG_*='$(CONFIG_SOFTMMU)'|CONFIG_*=y) # configuration
name=${line%=*}
echo "#define $name 1"
;;
diff --git a/scripts/feature_to_c.sh b/scripts/feature_to_c.sh
index fb1f3363f7..e4387b7fcf 100644
--- a/scripts/feature_to_c.sh
+++ b/scripts/feature_to_c.sh
@@ -37,8 +37,6 @@ for input; do
${AWK:-awk} 'BEGIN { n = 0
printf "#include \"qemu/osdep.h\"\n"
- printf "#include \"qemu-common.h\"\n"
- printf "#include \"exec/gdbstub.h\"\n"
print "static const char '$arrayname'[] = {"
for (i = 0; i < 255; i++)
_ord_[sprintf("%c", i)] = i
diff --git a/scripts/tracetool/format/tcg_helper_c.py b/scripts/tracetool/format/tcg_helper_c.py
index a089b0bf05..e3485b7f92 100644
--- a/scripts/tracetool/format/tcg_helper_c.py
+++ b/scripts/tracetool/format/tcg_helper_c.py
@@ -48,6 +48,7 @@ def generate(events, backend):
'',
'#include "qemu/osdep.h"',
'#include "qemu-common.h"',
+ '#include "cpu.h"',
'#include "trace.h"',
'#include "exec/helper-proto.h"',
'',
diff --git a/slirp/slirp.h b/slirp/slirp.h
index e37387605b..5df755e697 100644
--- a/slirp/slirp.h
+++ b/slirp/slirp.h
@@ -1,6 +1,7 @@
#ifndef __COMMON_H__
#define __COMMON_H__
+#include "qemu/host-utils.h"
#include "slirp_config.h"
#ifdef _WIN32
diff --git a/stubs/cpu-get-icount.c b/stubs/cpu-get-icount.c
index 3a6f2ab00f..2e8b63b225 100644
--- a/stubs/cpu-get-icount.c
+++ b/stubs/cpu-get-icount.c
@@ -1,6 +1,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "qemu/timer.h"
+#include "sysemu/cpus.h"
int use_icount;
diff --git a/stubs/slirp.c b/stubs/slirp.c
index dcae51f0e5..42f7e1afd0 100644
--- a/stubs/slirp.c
+++ b/stubs/slirp.c
@@ -1,5 +1,6 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include "slirp/slirp.h"
void slirp_pollfds_fill(GArray *pollfds, uint32_t *timeout)
diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h
index b01c6c82eb..bae4945344 100644
--- a/target-alpha/cpu-qom.h
+++ b/target-alpha/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_ALPHA_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_ALPHA_CPU "alpha-cpu"
@@ -48,44 +47,6 @@ typedef struct AlphaCPUClass {
void (*parent_reset)(CPUState *cpu);
} AlphaCPUClass;
-/**
- * AlphaCPU:
- * @env: #CPUAlphaState
- *
- * An Alpha CPU.
- */
-typedef struct AlphaCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUAlphaState env;
-
- /* This alarm doesn't exist in real hardware; we wish it did. */
- QEMUTimer *alarm_timer;
-} AlphaCPU;
-
-static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env)
-{
- return container_of(env, AlphaCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(alpha_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(AlphaCPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_alpha_cpu;
-#endif
-
-void alpha_cpu_do_interrupt(CPUState *cpu);
-bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+typedef struct AlphaCPU AlphaCPU;
#endif
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 8a155cae90..6d01d7f75e 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -24,6 +24,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index b25d7d09d0..e71ea70ea1 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -21,6 +21,7 @@
#define __CPU_ALPHA_H__
#include "qemu-common.h"
+#include "cpu-qom.h"
#define TARGET_LONG_BITS 64
#define ALIGNED_ONLY
@@ -284,12 +285,51 @@ struct CPUAlphaState {
int implver;
};
+/**
+ * AlphaCPU:
+ * @env: #CPUAlphaState
+ *
+ * An Alpha CPU.
+ */
+struct AlphaCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUAlphaState env;
+
+ /* This alarm doesn't exist in real hardware; we wish it did. */
+ QEMUTimer *alarm_timer;
+};
+
+static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env)
+{
+ return container_of(env, AlphaCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(alpha_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(AlphaCPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_alpha_cpu;
+#endif
+
+void alpha_cpu_do_interrupt(CPUState *cpu);
+bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+ int is_write, int is_user, uintptr_t retaddr);
+
#define cpu_list alpha_cpu_list
#define cpu_exec cpu_alpha_exec
#define cpu_signal_handler cpu_alpha_signal_handler
#include "exec/cpu-all.h"
-#include "cpu-qom.h"
enum {
FEATURE_ASN = 0x00000001,
@@ -485,6 +525,4 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
*pflags = flags;
}
-#include "exec/exec-all.h"
-
#endif /* !defined (__CPU_ALPHA_H__) */
diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c
index 5ab7d5e64d..9645978aaa 100644
--- a/target-alpha/fpu_helper.c
+++ b/target-alpha/fpu_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "fpu/softfloat.h"
diff --git a/target-alpha/gdbstub.c b/target-alpha/gdbstub.c
index 199f028425..d64bcccfa0 100644
--- a/target-alpha/gdbstub.c
+++ b/target-alpha/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int alpha_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 6dec2639b1..85168b7ed1 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "fpu/softfloat.h"
#include "exec/helper-proto.h"
diff --git a/target-alpha/int_helper.c b/target-alpha/int_helper.c
index 777e48d084..19bebfe742 100644
--- a/target-alpha/int_helper.c
+++ b/target-alpha/int_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
diff --git a/target-alpha/machine.c b/target-alpha/machine.c
index 9ab092852a..710b7835b4 100644
--- a/target-alpha/machine.c
+++ b/target-alpha/machine.c
@@ -1,6 +1,9 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
+#include "migration/cpu.h"
static int get_fpcr(QEMUFile *f, void *opaque, size_t size)
{
diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
index 7fee9a6e2b..7f4d15fef2 100644
--- a/target-alpha/mem_helper.c
+++ b/target-alpha/mem_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
/* Softmmu support */
diff --git a/target-alpha/sys_helper.c b/target-alpha/sys_helper.c
index e2dec15b60..bec1e178be 100644
--- a/target-alpha/sys_helper.c
+++ b/target-alpha/sys_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "sysemu/sysemu.h"
#include "qemu/timer.h"
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 8c2183a418..76dab154ee 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "disas/disas.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-alpha/vax_helper.c b/target-alpha/vax_helper.c
index e74ac3e042..2b0c178274 100644
--- a/target-alpha/vax_helper.c
+++ b/target-alpha/vax_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "fpu/softfloat.h"
diff --git a/target-arm/arm-powerctl.c b/target-arm/arm-powerctl.c
index cb9919b465..d452230515 100644
--- a/target-arm/arm-powerctl.c
+++ b/target-arm/arm-powerctl.c
@@ -13,6 +13,8 @@
#include <cpu-qom.h>
#include "internals.h"
#include "arm-powerctl.h"
+#include "qemu/log.h"
+#include "exec/exec-all.h"
#ifndef DEBUG_ARM_POWERCTL
#define DEBUG_ARM_POWERCTL 0
diff --git a/target-arm/arm_ldst.h b/target-arm/arm_ldst.h
index 35c2c43919..a76d89f62c 100644
--- a/target-arm/arm_ldst.h
+++ b/target-arm/arm_ldst.h
@@ -20,6 +20,7 @@
#ifndef ARM_LDST_H
#define ARM_LDST_H
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "qemu/bswap.h"
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 1061c08a10..3991173d47 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -22,6 +22,8 @@
#include "qom/cpu.h"
+struct arm_boot_info;
+
#define TYPE_ARM_CPU "arm-cpu"
#define ARM_CPU_CLASS(klass) \
@@ -47,145 +49,7 @@ typedef struct ARMCPUClass {
void (*parent_reset)(CPUState *cpu);
} ARMCPUClass;
-/**
- * ARMCPU:
- * @env: #CPUARMState
- *
- * An ARM CPU core.
- */
-typedef struct ARMCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUARMState env;
-
- /* Coprocessor information */
- GHashTable *cp_regs;
- /* For marshalling (mostly coprocessor) register state between the
- * kernel and QEMU (for KVM) and between two QEMUs (for migration),
- * we use these arrays.
- */
- /* List of register indexes managed via these arrays; (full KVM style
- * 64 bit indexes, not CPRegInfo 32 bit indexes)
- */
- uint64_t *cpreg_indexes;
- /* Values of the registers (cpreg_indexes[i]'s value is cpreg_values[i]) */
- uint64_t *cpreg_values;
- /* Length of the indexes, values, reset_values arrays */
- int32_t cpreg_array_len;
- /* These are used only for migration: incoming data arrives in
- * these fields and is sanity checked in post_load before copying
- * to the working data structures above.
- */
- uint64_t *cpreg_vmstate_indexes;
- uint64_t *cpreg_vmstate_values;
- int32_t cpreg_vmstate_array_len;
-
- /* Timers used by the generic (architected) timer */
- QEMUTimer *gt_timer[NUM_GTIMERS];
- /* GPIO outputs for generic timer */
- qemu_irq gt_timer_outputs[NUM_GTIMERS];
-
- /* MemoryRegion to use for secure physical accesses */
- MemoryRegion *secure_memory;
-
- /* 'compatible' string for this CPU for Linux device trees */
- const char *dtb_compatible;
-
- /* PSCI version for this CPU
- * Bits[31:16] = Major Version
- * Bits[15:0] = Minor Version
- */
- uint32_t psci_version;
-
- /* Should CPU start in PSCI powered-off state? */
- bool start_powered_off;
- /* CPU currently in PSCI powered-off state */
- bool powered_off;
- /* CPU has security extension */
- bool has_el3;
-
- /* CPU has memory protection unit */
- bool has_mpu;
- /* PMSAv7 MPU number of supported regions */
- uint32_t pmsav7_dregion;
-
- /* PSCI conduit used to invoke PSCI methods
- * 0 - disabled, 1 - smc, 2 - hvc
- */
- uint32_t psci_conduit;
-
- /* [QEMU_]KVM_ARM_TARGET_* constant for this CPU, or
- * QEMU_KVM_ARM_TARGET_NONE if the kernel doesn't support this CPU type.
- */
- uint32_t kvm_target;
-
- /* KVM init features for this CPU */
- uint32_t kvm_init_features[7];
-
- /* Uniprocessor system with MP extensions */
- bool mp_is_up;
-
- /* The instance init functions for implementation-specific subclasses
- * set these fields to specify the implementation-dependent values of
- * various constant registers and reset values of non-constant
- * registers.
- * Some of these might become QOM properties eventually.
- * Field names match the official register names as defined in the
- * ARMv7AR ARM Architecture Reference Manual. A reset_ prefix
- * is used for reset values of non-constant registers; no reset_
- * prefix means a constant register.
- */
- uint32_t midr;
- uint32_t revidr;
- uint32_t reset_fpsid;
- uint32_t mvfr0;
- uint32_t mvfr1;
- uint32_t mvfr2;
- uint32_t ctr;
- uint32_t reset_sctlr;
- uint32_t id_pfr0;
- uint32_t id_pfr1;
- uint32_t id_dfr0;
- uint32_t pmceid0;
- uint32_t pmceid1;
- uint32_t id_afr0;
- uint32_t id_mmfr0;
- uint32_t id_mmfr1;
- uint32_t id_mmfr2;
- uint32_t id_mmfr3;
- uint32_t id_mmfr4;
- uint32_t id_isar0;
- uint32_t id_isar1;
- uint32_t id_isar2;
- uint32_t id_isar3;
- uint32_t id_isar4;
- uint32_t id_isar5;
- uint64_t id_aa64pfr0;
- uint64_t id_aa64pfr1;
- uint64_t id_aa64dfr0;
- uint64_t id_aa64dfr1;
- uint64_t id_aa64afr0;
- uint64_t id_aa64afr1;
- uint64_t id_aa64isar0;
- uint64_t id_aa64isar1;
- uint64_t id_aa64mmfr0;
- uint64_t id_aa64mmfr1;
- uint32_t dbgdidr;
- uint32_t clidr;
- uint64_t mp_affinity; /* MP ID without feature bits */
- /* The elements of this array are the CCSIDR values for each cache,
- * in the order L1DCache, L1ICache, L2DCache, L2ICache, etc.
- */
- uint32_t ccsidr[16];
- uint64_t reset_cbar;
- uint32_t reset_auxcr;
- bool reset_hivecs;
- /* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
- uint32_t dcz_blocksize;
- uint64_t rvbar;
-} ARMCPU;
+typedef struct ARMCPU ARMCPU;
#define TYPE_AARCH64_CPU "aarch64-cpu"
#define AARCH64_CPU_CLASS(klass) \
@@ -199,40 +63,9 @@ typedef struct AArch64CPUClass {
/*< public >*/
} AArch64CPUClass;
-static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
-{
- return container_of(env, ARMCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(ARMCPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_arm_cpu;
-#endif
-
void register_cp_regs_for_features(ARMCPU *cpu);
void init_cpreg_list(ARMCPU *cpu);
-void arm_cpu_do_interrupt(CPUState *cpu);
-void arm_v7m_cpu_do_interrupt(CPUState *cpu);
-bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req);
-
-void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-
-hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
- MemTxAttrs *attrs);
-
-int arm_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-
-int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
-int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
-
/* Callback functions for the generic timer's timers. */
void arm_gt_ptimer_cb(void *opaque);
void arm_gt_vtimer_cb(void *opaque);
@@ -252,9 +85,4 @@ void arm_gt_stimer_cb(void *opaque);
#define ARM64_AFFINITY_MASK \
(ARM_AFF0_MASK|ARM_AFF1_MASK|ARM_AFF2_MASK|ARM_AFF3_MASK)
-#ifdef TARGET_AARCH64
-int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-#endif
-
#endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index e48e83acbb..3fd0743cb3 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "internals.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
#include "hw/qdev-properties.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 9deef86786..c741b53ad4 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -34,6 +34,7 @@
#define CPUArchState struct CPUARMState
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -91,8 +92,6 @@
#define ARM_CPU_VIRQ 2
#define ARM_CPU_VFIQ 3
-struct arm_boot_info;
-
#define NB_MMU_MODES 7
#define TARGET_INSN_START_EXTRA_WORDS 1
@@ -504,7 +503,181 @@ typedef struct CPUARMState {
const struct arm_boot_info *boot_info;
} CPUARMState;
-#include "cpu-qom.h"
+/**
+ * ARMCPU:
+ * @env: #CPUARMState
+ *
+ * An ARM CPU core.
+ */
+struct ARMCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUARMState env;
+
+ /* Coprocessor information */
+ GHashTable *cp_regs;
+ /* For marshalling (mostly coprocessor) register state between the
+ * kernel and QEMU (for KVM) and between two QEMUs (for migration),
+ * we use these arrays.
+ */
+ /* List of register indexes managed via these arrays; (full KVM style
+ * 64 bit indexes, not CPRegInfo 32 bit indexes)
+ */
+ uint64_t *cpreg_indexes;
+ /* Values of the registers (cpreg_indexes[i]'s value is cpreg_values[i]) */
+ uint64_t *cpreg_values;
+ /* Length of the indexes, values, reset_values arrays */
+ int32_t cpreg_array_len;
+ /* These are used only for migration: incoming data arrives in
+ * these fields and is sanity checked in post_load before copying
+ * to the working data structures above.
+ */
+ uint64_t *cpreg_vmstate_indexes;
+ uint64_t *cpreg_vmstate_values;
+ int32_t cpreg_vmstate_array_len;
+
+ /* Timers used by the generic (architected) timer */
+ QEMUTimer *gt_timer[NUM_GTIMERS];
+ /* GPIO outputs for generic timer */
+ qemu_irq gt_timer_outputs[NUM_GTIMERS];
+
+ /* MemoryRegion to use for secure physical accesses */
+ MemoryRegion *secure_memory;
+
+ /* 'compatible' string for this CPU for Linux device trees */
+ const char *dtb_compatible;
+
+ /* PSCI version for this CPU
+ * Bits[31:16] = Major Version
+ * Bits[15:0] = Minor Version
+ */
+ uint32_t psci_version;
+
+ /* Should CPU start in PSCI powered-off state? */
+ bool start_powered_off;
+ /* CPU currently in PSCI powered-off state */
+ bool powered_off;
+ /* CPU has security extension */
+ bool has_el3;
+
+ /* CPU has memory protection unit */
+ bool has_mpu;
+ /* PMSAv7 MPU number of supported regions */
+ uint32_t pmsav7_dregion;
+
+ /* PSCI conduit used to invoke PSCI methods
+ * 0 - disabled, 1 - smc, 2 - hvc
+ */
+ uint32_t psci_conduit;
+
+ /* [QEMU_]KVM_ARM_TARGET_* constant for this CPU, or
+ * QEMU_KVM_ARM_TARGET_NONE if the kernel doesn't support this CPU type.
+ */
+ uint32_t kvm_target;
+
+ /* KVM init features for this CPU */
+ uint32_t kvm_init_features[7];
+
+ /* Uniprocessor system with MP extensions */
+ bool mp_is_up;
+
+ /* The instance init functions for implementation-specific subclasses
+ * set these fields to specify the implementation-dependent values of
+ * various constant registers and reset values of non-constant
+ * registers.
+ * Some of these might become QOM properties eventually.
+ * Field names match the official register names as defined in the
+ * ARMv7AR ARM Architecture Reference Manual. A reset_ prefix
+ * is used for reset values of non-constant registers; no reset_
+ * prefix means a constant register.
+ */
+ uint32_t midr;
+ uint32_t revidr;
+ uint32_t reset_fpsid;
+ uint32_t mvfr0;
+ uint32_t mvfr1;
+ uint32_t mvfr2;
+ uint32_t ctr;
+ uint32_t reset_sctlr;
+ uint32_t id_pfr0;
+ uint32_t id_pfr1;
+ uint32_t id_dfr0;
+ uint32_t pmceid0;
+ uint32_t pmceid1;
+ uint32_t id_afr0;
+ uint32_t id_mmfr0;
+ uint32_t id_mmfr1;
+ uint32_t id_mmfr2;
+ uint32_t id_mmfr3;
+ uint32_t id_mmfr4;
+ uint32_t id_isar0;
+ uint32_t id_isar1;
+ uint32_t id_isar2;
+ uint32_t id_isar3;
+ uint32_t id_isar4;
+ uint32_t id_isar5;
+ uint64_t id_aa64pfr0;
+ uint64_t id_aa64pfr1;
+ uint64_t id_aa64dfr0;
+ uint64_t id_aa64dfr1;
+ uint64_t id_aa64afr0;
+ uint64_t id_aa64afr1;
+ uint64_t id_aa64isar0;
+ uint64_t id_aa64isar1;
+ uint64_t id_aa64mmfr0;
+ uint64_t id_aa64mmfr1;
+ uint32_t dbgdidr;
+ uint32_t clidr;
+ uint64_t mp_affinity; /* MP ID without feature bits */
+ /* The elements of this array are the CCSIDR values for each cache,
+ * in the order L1DCache, L1ICache, L2DCache, L2ICache, etc.
+ */
+ uint32_t ccsidr[16];
+ uint64_t reset_cbar;
+ uint32_t reset_auxcr;
+ bool reset_hivecs;
+ /* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
+ uint32_t dcz_blocksize;
+ uint64_t rvbar;
+};
+
+static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
+{
+ return container_of(env, ARMCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(ARMCPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_arm_cpu;
+#endif
+
+void arm_cpu_do_interrupt(CPUState *cpu);
+void arm_v7m_cpu_do_interrupt(CPUState *cpu);
+bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
+void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+
+hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs);
+
+int arm_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+
+int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+
+#ifdef TARGET_AARCH64
+int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+#endif
ARMCPU *cpu_arm_init(const char *cpu_model);
int cpu_arm_exec(CPUState *cpu);
@@ -2168,8 +2341,6 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
*cs_base = 0;
}
-#include "exec/exec-all.h"
-
enum {
QEMU_PSCI_CONDUIT_DISABLED = 0,
QEMU_PSCI_CONDUIT_SMC = 1,
diff --git a/target-arm/gdbstub.c b/target-arm/gdbstub.c
index 3ba9aadd48..04c1208d03 100644
--- a/target-arm/gdbstub.c
+++ b/target-arm/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
diff --git a/target-arm/gdbstub64.c b/target-arm/gdbstub64.c
index 634c6bc6f2..49bc3fc521 100644
--- a/target-arm/gdbstub64.c
+++ b/target-arm/gdbstub64.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int aarch64_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index c7bfb4d8f7..7c63556697 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -22,6 +22,7 @@
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "qemu/bitops.h"
#include "internals.h"
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a2ab701ca5..e3ea26f8c8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -8,6 +8,7 @@
#include "sysemu/sysemu.h"
#include "qemu/bitops.h"
#include "qemu/crc32c.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "arm_ldst.h"
#include <zlib.h> /* For crc32 */
@@ -5819,6 +5820,21 @@ static void do_v7m_exception_exit(CPUARMState *env)
pointer. */
}
+static void arm_log_exception(int idx)
+{
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
+ const char *exc = NULL;
+
+ if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
+ exc = excnames[idx];
+ }
+ if (!exc) {
+ exc = "unknown";
+ }
+ qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
+ }
+}
+
void arm_v7m_cpu_do_interrupt(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
diff --git a/target-arm/internals.h b/target-arm/internals.h
index 54a0fb1db7..a1258738d9 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -72,21 +72,6 @@ static const char * const excnames[] = {
[EXCP_SEMIHOST] = "Semihosting call",
};
-static inline void arm_log_exception(int idx)
-{
- if (qemu_loglevel_mask(CPU_LOG_INT)) {
- const char *exc = NULL;
-
- if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
- exc = excnames[idx];
- }
- if (!exc) {
- exc = "unknown";
- }
- qemu_log_mask(CPU_LOG_INT, "Taking exception %d [%s]\n", idx, exc);
- }
-}
-
/* Scale factor for generic timers, ie number of ns per tick.
* This gives a 62.5MHz timer.
*/
diff --git a/target-arm/kvm-stub.c b/target-arm/kvm-stub.c
index 38bf433876..b2c66df532 100644
--- a/target-arm/kvm-stub.c
+++ b/target-arm/kvm-stub.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "kvm_arm.h"
bool write_kvmstate_to_list(ARMCPU *cpu)
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 36710320f0..83da447cb7 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -25,6 +25,7 @@
#include "hw/arm/arm.h"
#include "exec/memattrs.h"
#include "hw/boards.h"
+#include "qemu/log.h"
const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c
index d44a7f92b6..c03e3e526a 100644
--- a/target-arm/kvm32.c
+++ b/target-arm/kvm32.c
@@ -15,13 +15,14 @@
#include <linux/kvm.h>
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
-#include "cpu.h"
#include "internals.h"
#include "hw/arm/arm.h"
+#include "qemu/log.h"
static inline void set_feature(uint64_t *features, int feature)
{
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index e8527bf0cc..e2a34f67a4 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -18,6 +18,7 @@
#include <linux/kvm.h>
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
#include "qemu/host-utils.h"
@@ -25,7 +26,6 @@
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
-#include "cpu.h"
#include "internals.h"
#include "hw/arm/arm.h"
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 03a73d950e..2f452603f1 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -1,10 +1,13 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
#include "internals.h"
+#include "migration/cpu.h"
static bool vfp_needed(void *opaque)
{
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index c7fba8526c..0b29b9dbf2 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -20,6 +20,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "internals.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#define SIGNBIT (uint32_t)0x80000000
diff --git a/target-arm/psci.c b/target-arm/psci.c
index ce2e0dca39..4db9b8ce24 100644
--- a/target-arm/psci.c
+++ b/target-arm/psci.c
@@ -17,12 +17,12 @@
*/
#include "qemu/osdep.h"
#include <cpu.h>
-#include <cpu-qom.h>
#include <exec/helper-proto.h>
#include <kvm-consts.h>
#include <sysemu/sysemu.h>
#include "internals.h"
#include "arm-powerctl.h"
+#include "exec/exec-all.h"
bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
{
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 5526bbda2c..ce8141a442 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/log.h"
#include "arm_ldst.h"
diff --git a/target-arm/translate.c b/target-arm/translate.c
index a43b1f61cf..e525f1eb4e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "internals.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/log.h"
#include "qemu/bitops.h"
diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h
index df4c0b50a3..7556e9f97e 100644
--- a/target-cris/cpu-qom.h
+++ b/target-cris/cpu-qom.h
@@ -50,44 +50,6 @@ typedef struct CRISCPUClass {
uint32_t vr;
} CRISCPUClass;
-/**
- * CRISCPU:
- * @env: #CPUCRISState
- *
- * A CRIS CPU.
- */
-typedef struct CRISCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUCRISState env;
-} CRISCPU;
-
-static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)
-{
- return container_of(env, CRISCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(CRISCPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_cris_cpu;
-#endif
-
-void cris_cpu_do_interrupt(CPUState *cpu);
-void crisv10_cpu_do_interrupt(CPUState *cpu);
-bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
-
-void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-
-hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-
-int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+typedef struct CRISCPU CRISCPU;
#endif
diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index 1cb79dd977..c5a656bb62 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -26,6 +26,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "mmu.h"
+#include "exec/exec-all.h"
static void cris_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index a492fc687f..d8c47a6c2e 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -21,6 +21,7 @@
#define CPU_CRIS_H
#include "qemu-common.h"
+#include "cpu-qom.h"
#define TARGET_LONG_BITS 32
@@ -171,7 +172,45 @@ typedef struct CPUCRISState {
void *load_info;
} CPUCRISState;
-#include "cpu-qom.h"
+/**
+ * CRISCPU:
+ * @env: #CPUCRISState
+ *
+ * A CRIS CPU.
+ */
+struct CRISCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUCRISState env;
+};
+
+static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)
+{
+ return container_of(env, CRISCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(CRISCPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_cris_cpu;
+#endif
+
+void cris_cpu_do_interrupt(CPUState *cpu);
+void crisv10_cpu_do_interrupt(CPUState *cpu);
+bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
+void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+
+hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+
+int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
CRISCPU *cpu_cris_init(const char *cpu_model);
int cpu_cris_exec(CPUState *cpu);
@@ -261,6 +300,4 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
#define cpu_list cris_cpu_list
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-cris/gdbstub.c b/target-cris/gdbstub.c
index 1bbf17b04a..3a72ee2a98 100644
--- a/target-cris/gdbstub.c
+++ b/target-cris/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int crisv10_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-cris/helper.c b/target-cris/helper.c
index 1eb9fd9184..af78cca8b9 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "mmu.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
diff --git a/target-cris/machine.c b/target-cris/machine.c
index 9cc2820e85..6b797e8c1d 100644
--- a/target-cris/machine.c
+++ b/target-cris/machine.c
@@ -19,7 +19,10 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
+#include "migration/cpu.h"
static const VMStateDescription vmstate_tlbset = {
.name = "cpu/tlbset",
diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index 4278d2dce4..b8db908823 100644
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "mmu.h"
#ifdef DEBUG
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index 320f2b80d2..675ab86d44 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -23,6 +23,7 @@
#include "mmu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
//#define CRIS_OP_HELPER_DEBUG
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 420051e940..2153ea7af6 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -26,6 +26,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/helper-proto.h"
#include "mmu.h"
diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c
index f47df19988..499a277567 100644
--- a/target-i386/bpt_helper.c
+++ b/target-i386/bpt_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index cb750176c0..5dde658ac4 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_I386_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#include "qemu/notify.h"
#ifdef TARGET_X86_64
@@ -68,101 +67,6 @@ typedef struct X86CPUClass {
void (*parent_reset)(CPUState *cpu);
} X86CPUClass;
-/**
- * X86CPU:
- * @env: #CPUX86State
- * @migratable: If set, only migratable flags will be accepted when "enforce"
- * mode is used, and only migratable flags will be included in the "host"
- * CPU model.
- *
- * An x86 CPU.
- */
-typedef struct X86CPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUX86State env;
-
- bool hyperv_vapic;
- bool hyperv_relaxed_timing;
- int hyperv_spinlock_attempts;
- char *hyperv_vendor_id;
- bool hyperv_time;
- bool hyperv_crash;
- bool hyperv_reset;
- bool hyperv_vpindex;
- bool hyperv_runtime;
- bool hyperv_synic;
- bool hyperv_stimer;
- bool check_cpuid;
- bool enforce_cpuid;
- bool expose_kvm;
- bool migratable;
- bool host_features;
- int64_t apic_id;
-
- /* if true the CPUID code directly forward host cache leaves to the guest */
- bool cache_info_passthrough;
-
- /* Features that were filtered out because of missing host capabilities */
- uint32_t filtered_features[FEATURE_WORDS];
-
- /* Enable PMU CPUID bits. This can't be enabled by default yet because
- * it doesn't have ABI stability guarantees, as it passes all PMU CPUID
- * bits returned by GET_SUPPORTED_CPUID (that depend on host CPU and kernel
- * capabilities) directly to the guest.
- */
- bool enable_pmu;
-
- /* in order to simplify APIC support, we leave this pointer to the
- user */
- struct DeviceState *apic_state;
- struct MemoryRegion *cpu_as_root, *cpu_as_mem, *smram;
- Notifier machine_done;
-} X86CPU;
-
-static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
-{
- return container_of(env, X86CPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(X86CPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern struct VMStateDescription vmstate_x86_cpu;
-#endif
-
-/**
- * x86_cpu_do_interrupt:
- * @cpu: vCPU the interrupt is to be handled by.
- */
-void x86_cpu_do_interrupt(CPUState *cpu);
-bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
-
-int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
- int cpuid, void *opaque);
-int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
- int cpuid, void *opaque);
-int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
- void *opaque);
-int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
- void *opaque);
-
-void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
- Error **errp);
-
-void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-
-hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-
-int x86_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-
-void x86_cpu_exec_enter(CPUState *cpu);
-void x86_cpu_exec_exit(CPUState *cpu);
+typedef struct X86CPU X86CPU;
#endif
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index da5d081c0c..05bf5ed2f0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -20,6 +20,7 @@
#include "qemu/cutils.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "sysemu/kvm.h"
#include "sysemu/cpus.h"
#include "kvm_i386.h"
@@ -34,7 +35,6 @@
#include "qapi/visitor.h"
#include "sysemu/arch_init.h"
-#include "hw/hw.h"
#if defined(CONFIG_KVM)
#include <linux/kvm_para.h>
#endif
@@ -43,6 +43,7 @@
#include "hw/qdev-properties.h"
#ifndef CONFIG_USER_ONLY
#include "exec/address-spaces.h"
+#include "hw/hw.h"
#include "hw/xen/xen.h"
#include "hw/i386/apic_internal.h"
#endif
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 0e113245e6..5cf2422efb 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -20,6 +20,7 @@
#define CPU_I386_H
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "standard-headers/asm-x86/hyperv.h"
#ifdef TARGET_X86_64
@@ -1028,7 +1029,102 @@ typedef struct CPUX86State {
TPRAccess tpr_access_type;
} CPUX86State;
-#include "cpu-qom.h"
+/**
+ * X86CPU:
+ * @env: #CPUX86State
+ * @migratable: If set, only migratable flags will be accepted when "enforce"
+ * mode is used, and only migratable flags will be included in the "host"
+ * CPU model.
+ *
+ * An x86 CPU.
+ */
+struct X86CPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUX86State env;
+
+ bool hyperv_vapic;
+ bool hyperv_relaxed_timing;
+ int hyperv_spinlock_attempts;
+ char *hyperv_vendor_id;
+ bool hyperv_time;
+ bool hyperv_crash;
+ bool hyperv_reset;
+ bool hyperv_vpindex;
+ bool hyperv_runtime;
+ bool hyperv_synic;
+ bool hyperv_stimer;
+ bool check_cpuid;
+ bool enforce_cpuid;
+ bool expose_kvm;
+ bool migratable;
+ bool host_features;
+ int64_t apic_id;
+
+ /* if true the CPUID code directly forward host cache leaves to the guest */
+ bool cache_info_passthrough;
+
+ /* Features that were filtered out because of missing host capabilities */
+ uint32_t filtered_features[FEATURE_WORDS];
+
+ /* Enable PMU CPUID bits. This can't be enabled by default yet because
+ * it doesn't have ABI stability guarantees, as it passes all PMU CPUID
+ * bits returned by GET_SUPPORTED_CPUID (that depend on host CPU and kernel
+ * capabilities) directly to the guest.
+ */
+ bool enable_pmu;
+
+ /* in order to simplify APIC support, we leave this pointer to the
+ user */
+ struct DeviceState *apic_state;
+ struct MemoryRegion *cpu_as_root, *cpu_as_mem, *smram;
+ Notifier machine_done;
+};
+
+static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
+{
+ return container_of(env, X86CPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(X86CPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern struct VMStateDescription vmstate_x86_cpu;
+#endif
+
+/**
+ * x86_cpu_do_interrupt:
+ * @cpu: vCPU the interrupt is to be handled by.
+ */
+void x86_cpu_do_interrupt(CPUState *cpu);
+bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
+int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
+ int cpuid, void *opaque);
+int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
+ int cpuid, void *opaque);
+int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
+ void *opaque);
+int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
+ void *opaque);
+
+void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
+ Error **errp);
+
+void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+
+hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+
+int x86_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+
+void x86_cpu_exec_enter(CPUState *cpu);
+void x86_cpu_exec_exit(CPUState *cpu);
X86CPU *cpu_x86_init(const char *cpu_model);
X86CPU *cpu_x86_create(const char *cpu_model, Error **errp);
@@ -1266,8 +1362,6 @@ void tcg_x86_init(void);
#include "hw/i386/apic.h"
#endif
-#include "exec/exec-all.h"
-
static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
{
@@ -1359,7 +1453,11 @@ void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
void do_smm_enter(X86CPU *cpu);
void cpu_smm_update(X86CPU *cpu);
+/* apic.c */
void cpu_report_tpr_access(CPUX86State *env, TPRAccess access);
+void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
+ TPRAccess access);
+
/* Change the value of a KVM-specific default
*
@@ -1385,4 +1483,7 @@ void enable_compat_apic_id_mode(void);
void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf, int flags);
+/* cpu.c */
+bool cpu_is_bsp(X86CPU *cpu);
+
#endif /* CPU_I386_H */
diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c
index ef37f42401..f0dc4996c1 100644
--- a/target-i386/excp_helper.c
+++ b/target-i386/excp_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "exec/helper-proto.h"
diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c
index fee5573a10..206e60fdf5 100644
--- a/target-i386/fpu_helper.c
+++ b/target-i386/fpu_helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#define FPU_RC_MASK 0xc00
diff --git a/target-i386/gdbstub.c b/target-i386/gdbstub.c
index 4b5071398f..c494535df1 100644
--- a/target-i386/gdbstub.c
+++ b/target-i386/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
#ifdef TARGET_X86_64
diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf3e76207e..889fdab45a 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "sysemu/kvm.h"
#include "kvm_i386.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c
index cf5bbb0481..9e873ac150 100644
--- a/target-i386/int_helper.c
+++ b/target-i386/int_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
diff --git a/target-i386/kvm-stub.c b/target-i386/kvm-stub.c
index 8df9c5953f..cdf1506109 100644
--- a/target-i386/kvm-stub.c
+++ b/target-i386/kvm-stub.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "kvm_i386.h"
bool kvm_allows_irq0_override(void)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 799fdfa682..c76e7bbc89 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -22,10 +22,10 @@
#include <linux/kvm_para.h>
#include "qemu-common.h"
+#include "cpu.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm_int.h"
#include "kvm_i386.h"
-#include "cpu.h"
#include "hyperv.h"
#include "exec/gdbstub.h"
diff --git a/target-i386/machine.c b/target-i386/machine.c
index ee5b94922b..cb9adf2b02 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -1,10 +1,16 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/i386/pc.h"
#include "hw/isa/isa.h"
+#include "migration/cpu.h"
+#include "exec/exec-all.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "sysemu/kvm.h"
#include "qemu/error-report.h"
diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c
index 85e75161bc..c2f4769d4b 100644
--- a/target-i386/mem_helper.c
+++ b/target-i386/mem_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
/* broken thread support */
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index e31ec976a4..3f666b4b87 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/address-spaces.h"
diff --git a/target-i386/mpx_helper.c b/target-i386/mpx_helper.c
index 4d1785ecef..7e44820659 100644
--- a/target-i386/mpx_helper.c
+++ b/target-i386/mpx_helper.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
+#include "exec/exec-all.h"
void cpu_sync_bndcs_hflags(CPUX86State *env)
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index b5f3d72fe3..97aee092dc 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "qemu/log.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/log.h"
diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index ab472f6eea..782b3f12f0 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "exec/cpu-all.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
/* Secure Virtual Machine helpers */
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 868c26244b..8085467945 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -21,6 +21,7 @@
#include "qemu/host-utils.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h
index 77bc7b2686..b423d2564b 100644
--- a/target-lm32/cpu-qom.h
+++ b/target-lm32/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_LM32_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_LM32_CPU "lm32-cpu"
@@ -48,45 +47,6 @@ typedef struct LM32CPUClass {
void (*parent_reset)(CPUState *cpu);
} LM32CPUClass;
-/**
- * LM32CPU:
- * @env: #CPULM32State
- *
- * A LatticeMico32 CPU.
- */
-typedef struct LM32CPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPULM32State env;
-
- uint32_t revision;
- uint8_t num_interrupts;
- uint8_t num_breakpoints;
- uint8_t num_watchpoints;
- uint32_t features;
-} LM32CPU;
-
-static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
-{
- return container_of(env, LM32CPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(LM32CPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_lm32_cpu;
-#endif
-
-void lm32_cpu_do_interrupt(CPUState *cpu);
-bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
-void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+typedef struct LM32CPU LM32CPU;
#endif
diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index 6e7e1b8e63..a783d461dd 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -22,6 +22,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 6a0d297b30..62880f7e4b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -25,6 +25,7 @@
#define CPUArchState struct CPULM32State
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
struct CPULM32State;
typedef struct CPULM32State CPULM32State;
@@ -180,6 +181,47 @@ struct CPULM32State {
};
+/**
+ * LM32CPU:
+ * @env: #CPULM32State
+ *
+ * A LatticeMico32 CPU.
+ */
+struct LM32CPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPULM32State env;
+
+ uint32_t revision;
+ uint8_t num_interrupts;
+ uint8_t num_breakpoints;
+ uint8_t num_watchpoints;
+ uint32_t features;
+};
+
+static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
+{
+ return container_of(env, LM32CPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(LM32CPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_lm32_cpu;
+#endif
+
+void lm32_cpu_do_interrupt(CPUState *cpu);
+bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
+void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+
typedef enum {
LM32_WP_DISABLED = 0,
LM32_WP_READ,
@@ -193,8 +235,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)
return (dc >> (idx+1)*2) & 0x3;
}
-#include "cpu-qom.h"
-
LM32CPU *cpu_lm32_init(const char *cpu_model);
int cpu_lm32_exec(CPUState *cpu);
/* you can call this signal handler from your SIGBUS and SIGSEGV
@@ -233,6 +273,4 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
*flags = 0;
}
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c
index 8ac1288bb6..cf929dd392 100644
--- a/target-lm32/gdbstub.c
+++ b/target-lm32/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
#include "hw/lm32/lm32_pic.h"
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 655248f81a..b8f4ed9960 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "sysemu/sysemu.h"
#include "exec/semihost.h"
diff --git a/target-lm32/machine.c b/target-lm32/machine.c
index 91c943d193..3c258a4bcc 100644
--- a/target-lm32/machine.c
+++ b/target-lm32/machine.c
@@ -1,6 +1,9 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
+#include "migration/cpu.h"
static const VMStateDescription vmstate_env = {
.name = "env",
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index b6759e0225..7a550d1c0c 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -6,6 +6,7 @@
#include "hw/lm32/lm32_pic.h"
#include "hw/char/lm32_juart.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index dd972f5b8c..d09d81447b 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "disas/disas.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-m68k/cpu-qom.h b/target-m68k/cpu-qom.h
index c28e55d6b7..9885bba317 100644
--- a/target-m68k/cpu-qom.h
+++ b/target-m68k/cpu-qom.h
@@ -47,38 +47,6 @@ typedef struct M68kCPUClass {
void (*parent_reset)(CPUState *cpu);
} M68kCPUClass;
-/**
- * M68kCPU:
- * @env: #CPUM68KState
- *
- * A Motorola 68k CPU.
- */
-typedef struct M68kCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUM68KState env;
-} M68kCPU;
-
-static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env)
-{
- return container_of(env, M68kCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(m68k_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(M68kCPU, env)
-
-void m68k_cpu_do_interrupt(CPUState *cpu);
-bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-
-void m68k_cpu_exec_enter(CPUState *cs);
-void m68k_cpu_exec_exit(CPUState *cs);
+typedef struct M68kCPU M68kCPU;
#endif
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index 0b5f9a581e..116b784e63 100644
--- a/target-m68k/cpu.c
+++ b/target-m68k/cpu.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index d2f467ca9b..008a057a97 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -26,7 +26,7 @@
#include "qemu-common.h"
#include "exec/cpu-defs.h"
-
+#include "cpu-qom.h"
#include "fpu/softfloat.h"
#define MAX_QREGS 32
@@ -109,7 +109,39 @@ typedef struct CPUM68KState {
uint32_t features;
} CPUM68KState;
-#include "cpu-qom.h"
+/**
+ * M68kCPU:
+ * @env: #CPUM68KState
+ *
+ * A Motorola 68k CPU.
+ */
+struct M68kCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUM68KState env;
+};
+
+static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env)
+{
+ return container_of(env, M68kCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(m68k_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(M68kCPU, env)
+
+void m68k_cpu_do_interrupt(CPUState *cpu);
+bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+
+void m68k_cpu_exec_enter(CPUState *cs);
+void m68k_cpu_exec_exit(CPUState *cs);
void m68k_tcg_init(void);
void m68k_cpu_init_gdb(M68kCPU *cpu);
@@ -239,6 +271,4 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
| ((env->macsr >> 4) & 0xf); /* Bits 0-3 */
}
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-m68k/gdbstub.c b/target-m68k/gdbstub.c
index f02bb5caf4..c7f44c9bb3 100644
--- a/target-m68k/gdbstub.c
+++ b/target-m68k/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index a8f6d9d6a6..427cbedfd5 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
diff --git a/target-m68k/m68k-semi.c b/target-m68k/m68k-semi.c
index f360ef3e17..1402145c8f 100644
--- a/target-m68k/m68k-semi.c
+++ b/target-m68k/m68k-semi.c
@@ -28,6 +28,7 @@
#include "exec/gdbstub.h"
#include "exec/softmmu-semi.h"
#endif
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#define HOSTED_EXIT 0
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
index 17d0a11914..ff32e35461 100644
--- a/target-m68k/op_helper.c
+++ b/target-m68k/op_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/semihost.h"
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e46356e44c..f90187ff96 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/log.h"
#include "exec/cpu_ldst.h"
diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h
index 34f6273ad1..1a61db77d0 100644
--- a/target-microblaze/cpu-qom.h
+++ b/target-microblaze/cpu-qom.h
@@ -47,48 +47,6 @@ typedef struct MicroBlazeCPUClass {
void (*parent_reset)(CPUState *cpu);
} MicroBlazeCPUClass;
-/**
- * MicroBlazeCPU:
- * @env: #CPUMBState
- *
- * A MicroBlaze CPU.
- */
-typedef struct MicroBlazeCPU {
- /*< private >*/
- CPUState parent_obj;
-
- /*< public >*/
-
- /* Microblaze Configuration Settings */
- struct {
- bool stackprot;
- uint32_t base_vectors;
- uint8_t use_fpu;
- bool use_mmu;
- bool dcache_writeback;
- bool endi;
- char *version;
- uint8_t pvr;
- } cfg;
-
- CPUMBState env;
-} MicroBlazeCPU;
-
-static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env)
-{
- return container_of(env, MicroBlazeCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(mb_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(MicroBlazeCPU, env)
-
-void mb_cpu_do_interrupt(CPUState *cs);
-bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
-void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+typedef struct MicroBlazeCPU MicroBlazeCPU;
#endif
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index fdfb01917f..8edc00a796 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -27,6 +27,7 @@
#include "qemu-common.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static const struct {
const char *name;
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index bf74e2c032..d17cf1e301 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -20,6 +20,7 @@
#define CPU_MICROBLAZE_H
#include "qemu-common.h"
+#include "cpu-qom.h"
#define TARGET_LONG_BITS 32
@@ -274,7 +275,49 @@ struct CPUMBState {
} pvr;
};
-#include "cpu-qom.h"
+/**
+ * MicroBlazeCPU:
+ * @env: #CPUMBState
+ *
+ * A MicroBlaze CPU.
+ */
+struct MicroBlazeCPU {
+ /*< private >*/
+ CPUState parent_obj;
+
+ /*< public >*/
+
+ /* Microblaze Configuration Settings */
+ struct {
+ bool stackprot;
+ uint32_t base_vectors;
+ uint8_t use_fpu;
+ bool use_mmu;
+ bool dcache_writeback;
+ bool endi;
+ char *version;
+ uint8_t pvr;
+ } cfg;
+
+ CPUMBState env;
+};
+
+static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env)
+{
+ return container_of(env, MicroBlazeCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(mb_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(MicroBlazeCPU, env)
+
+void mb_cpu_do_interrupt(CPUState *cs);
+bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
+void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mb_tcg_init(void);
MicroBlazeCPU *cpu_mb_init(const char *cpu_model);
@@ -336,6 +379,4 @@ void mb_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
unsigned size);
#endif
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-microblaze/gdbstub.c b/target-microblaze/gdbstub.c
index 89d38980bf..7fb076c2e9 100644
--- a/target-microblaze/gdbstub.c
+++ b/target-microblaze/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int mb_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index 4de6bdbf83..da394d1dfc 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/log.h"
diff --git a/target-microblaze/mmu.c b/target-microblaze/mmu.c
index 4ac3040357..a22a496ebb 100644
--- a/target-microblaze/mmu.c
+++ b/target-microblaze/mmu.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#define D(x)
diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
index 97333881f0..0533939389 100644
--- a/target-microblaze/op_helper.c
+++ b/target-microblaze/op_helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#define D(x)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index a7a8ac8f99..513f390807 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/helper-proto.h"
#include "microblaze-decode.h"
diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h
index 4d6f9de2ed..3f5bf23823 100644
--- a/target-mips/cpu-qom.h
+++ b/target-mips/cpu-qom.h
@@ -51,41 +51,6 @@ typedef struct MIPSCPUClass {
void (*parent_reset)(CPUState *cpu);
} MIPSCPUClass;
-/**
- * MIPSCPU:
- * @env: #CPUMIPSState
- *
- * A MIPS CPU.
- */
-typedef struct MIPSCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUMIPSState env;
-} MIPSCPU;
-
-static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
-{
- return container_of(env, MIPSCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(MIPSCPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_mips_cpu;
-#endif
-
-void mips_cpu_do_interrupt(CPUState *cpu);
-bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+typedef struct MIPSCPU MIPSCPU;
#endif
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 0e2ecbebec..64ad112f4d 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -24,6 +24,7 @@
#include "kvm_mips.h"
#include "qemu-common.h"
#include "sysemu/kvm.h"
+#include "exec/exec-all.h"
static void mips_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 53e826223f..4ce9d47661 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -8,6 +8,7 @@
#define CPUArchState struct CPUMIPSState
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "mips-defs.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -615,7 +616,42 @@ struct CPUMIPSState {
MemoryRegion *itc_tag; /* ITC Configuration Tags */
};
-#include "cpu-qom.h"
+/**
+ * MIPSCPU:
+ * @env: #CPUMIPSState
+ *
+ * A MIPS CPU.
+ */
+struct MIPSCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUMIPSState env;
+};
+
+static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
+{
+ return container_of(env, MIPSCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(MIPSCPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_mips_cpu;
+#endif
+
+void mips_cpu_do_interrupt(CPUState *cpu);
+bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+ int is_write, int is_user, uintptr_t retaddr);
#if !defined(CONFIG_USER_ONLY)
int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
@@ -898,8 +934,6 @@ static inline int mips_vp_active(CPUMIPSState *env)
return 1;
}
-#include "exec/exec-all.h"
-
static inline void compute_hflags(CPUMIPSState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
@@ -999,132 +1033,13 @@ static inline void compute_hflags(CPUMIPSState *env)
}
}
-#ifndef CONFIG_USER_ONLY
-static inline void cpu_mips_tlb_flush(CPUMIPSState *env, int flush_global)
-{
- MIPSCPU *cpu = mips_env_get_cpu(env);
+void cpu_mips_tlb_flush(CPUMIPSState *env, int flush_global);
+void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
+void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
+void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
- /* Flush qemu's TLB and discard all shadowed entries. */
- tlb_flush(CPU(cpu), flush_global);
- env->tlb->tlb_in_use = env->tlb->nb_tlb;
-}
-
-/* Called for updates to CP0_Status. */
-static inline void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc)
-{
- int32_t tcstatus, *tcst;
- uint32_t v = cpu->CP0_Status;
- uint32_t cu, mx, asid, ksu;
- uint32_t mask = ((1 << CP0TCSt_TCU3)
- | (1 << CP0TCSt_TCU2)
- | (1 << CP0TCSt_TCU1)
- | (1 << CP0TCSt_TCU0)
- | (1 << CP0TCSt_TMX)
- | (3 << CP0TCSt_TKSU)
- | (0xff << CP0TCSt_TASID));
-
- cu = (v >> CP0St_CU0) & 0xf;
- mx = (v >> CP0St_MX) & 0x1;
- ksu = (v >> CP0St_KSU) & 0x3;
- asid = env->CP0_EntryHi & 0xff;
-
- tcstatus = cu << CP0TCSt_TCU0;
- tcstatus |= mx << CP0TCSt_TMX;
- tcstatus |= ksu << CP0TCSt_TKSU;
- tcstatus |= asid;
-
- if (tc == cpu->current_tc) {
- tcst = &cpu->active_tc.CP0_TCStatus;
- } else {
- tcst = &cpu->tcs[tc].CP0_TCStatus;
- }
-
- *tcst &= ~mask;
- *tcst |= tcstatus;
- compute_hflags(cpu);
-}
-
-static inline void cpu_mips_store_status(CPUMIPSState *env, target_ulong val)
-{
- uint32_t mask = env->CP0_Status_rw_bitmask;
- target_ulong old = env->CP0_Status;
-
- if (env->insn_flags & ISA_MIPS32R6) {
- bool has_supervisor = extract32(mask, CP0St_KSU, 2) == 0x3;
-#if defined(TARGET_MIPS64)
- uint32_t ksux = (1 << CP0St_KX) & val;
- ksux |= (ksux >> 1) & val; /* KX = 0 forces SX to be 0 */
- ksux |= (ksux >> 1) & val; /* SX = 0 forces UX to be 0 */
- val = (val & ~(7 << CP0St_UX)) | ksux;
-#endif
- if (has_supervisor && extract32(val, CP0St_KSU, 2) == 0x3) {
- mask &= ~(3 << CP0St_KSU);
- }
- mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val);
- }
-
- env->CP0_Status = (old & ~mask) | (val & mask);
-#if defined(TARGET_MIPS64)
- if ((env->CP0_Status ^ old) & (old & (7 << CP0St_UX))) {
- /* Access to at least one of the 64-bit segments has been disabled */
- cpu_mips_tlb_flush(env, 1);
- }
-#endif
- if (env->CP0_Config3 & (1 << CP0C3_MT)) {
- sync_c0_status(env, env, env->current_tc);
- } else {
- compute_hflags(env);
- }
-}
-
-static inline void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
-{
- uint32_t mask = 0x00C00300;
- uint32_t old = env->CP0_Cause;
- int i;
-
- if (env->insn_flags & ISA_MIPS32R2) {
- mask |= 1 << CP0Ca_DC;
- }
- if (env->insn_flags & ISA_MIPS32R6) {
- mask &= ~((1 << CP0Ca_WP) & val);
- }
-
- env->CP0_Cause = (env->CP0_Cause & ~mask) | (val & mask);
-
- if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) {
- if (env->CP0_Cause & (1 << CP0Ca_DC)) {
- cpu_mips_stop_count(env);
- } else {
- cpu_mips_start_count(env);
- }
- }
-
- /* Set/reset software interrupts */
- for (i = 0 ; i < 2 ; i++) {
- if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
- cpu_mips_soft_irq(env, i, env->CP0_Cause & (1 << (CP0Ca_IP + i)));
- }
- }
-}
-#endif
-
-static inline void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
- uint32_t exception,
- int error_code,
- uintptr_t pc)
-{
- CPUState *cs = CPU(mips_env_get_cpu(env));
-
- if (exception < EXCP_SC) {
- qemu_log_mask(CPU_LOG_INT, "%s: %d %d\n",
- __func__, exception, error_code);
- }
- cs->exception_index = exception;
- env->error_code = error_code;
-
- cpu_loop_exit_restore(cs, pc);
-}
+void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
+ int error_code, uintptr_t pc);
static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
uint32_t exception,
diff --git a/target-mips/gdbstub.c b/target-mips/gdbstub.c
index b0b4a32ec0..2707ff5c2b 100644
--- a/target-mips/gdbstub.c
+++ b/target-mips/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index cfea177ee5..65fbef0050 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -20,6 +20,7 @@
#include "cpu.h"
#include "sysemu/kvm.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/log.h"
@@ -221,6 +222,114 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
}
return ret;
}
+
+void cpu_mips_tlb_flush(CPUMIPSState *env, int flush_global)
+{
+ MIPSCPU *cpu = mips_env_get_cpu(env);
+
+ /* Flush qemu's TLB and discard all shadowed entries. */
+ tlb_flush(CPU(cpu), flush_global);
+ env->tlb->tlb_in_use = env->tlb->nb_tlb;
+}
+
+/* Called for updates to CP0_Status. */
+void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc)
+{
+ int32_t tcstatus, *tcst;
+ uint32_t v = cpu->CP0_Status;
+ uint32_t cu, mx, asid, ksu;
+ uint32_t mask = ((1 << CP0TCSt_TCU3)
+ | (1 << CP0TCSt_TCU2)
+ | (1 << CP0TCSt_TCU1)
+ | (1 << CP0TCSt_TCU0)
+ | (1 << CP0TCSt_TMX)
+ | (3 << CP0TCSt_TKSU)
+ | (0xff << CP0TCSt_TASID));
+
+ cu = (v >> CP0St_CU0) & 0xf;
+ mx = (v >> CP0St_MX) & 0x1;
+ ksu = (v >> CP0St_KSU) & 0x3;
+ asid = env->CP0_EntryHi & 0xff;
+
+ tcstatus = cu << CP0TCSt_TCU0;
+ tcstatus |= mx << CP0TCSt_TMX;
+ tcstatus |= ksu << CP0TCSt_TKSU;
+ tcstatus |= asid;
+
+ if (tc == cpu->current_tc) {
+ tcst = &cpu->active_tc.CP0_TCStatus;
+ } else {
+ tcst = &cpu->tcs[tc].CP0_TCStatus;
+ }
+
+ *tcst &= ~mask;
+ *tcst |= tcstatus;
+ compute_hflags(cpu);
+}
+
+void cpu_mips_store_status(CPUMIPSState *env, target_ulong val)
+{
+ uint32_t mask = env->CP0_Status_rw_bitmask;
+ target_ulong old = env->CP0_Status;
+
+ if (env->insn_flags & ISA_MIPS32R6) {
+ bool has_supervisor = extract32(mask, CP0St_KSU, 2) == 0x3;
+#if defined(TARGET_MIPS64)
+ uint32_t ksux = (1 << CP0St_KX) & val;
+ ksux |= (ksux >> 1) & val; /* KX = 0 forces SX to be 0 */
+ ksux |= (ksux >> 1) & val; /* SX = 0 forces UX to be 0 */
+ val = (val & ~(7 << CP0St_UX)) | ksux;
+#endif
+ if (has_supervisor && extract32(val, CP0St_KSU, 2) == 0x3) {
+ mask &= ~(3 << CP0St_KSU);
+ }
+ mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val);
+ }
+
+ env->CP0_Status = (old & ~mask) | (val & mask);
+#if defined(TARGET_MIPS64)
+ if ((env->CP0_Status ^ old) & (old & (7 << CP0St_UX))) {
+ /* Access to at least one of the 64-bit segments has been disabled */
+ cpu_mips_tlb_flush(env, 1);
+ }
+#endif
+ if (env->CP0_Config3 & (1 << CP0C3_MT)) {
+ sync_c0_status(env, env, env->current_tc);
+ } else {
+ compute_hflags(env);
+ }
+}
+
+void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
+{
+ uint32_t mask = 0x00C00300;
+ uint32_t old = env->CP0_Cause;
+ int i;
+
+ if (env->insn_flags & ISA_MIPS32R2) {
+ mask |= 1 << CP0Ca_DC;
+ }
+ if (env->insn_flags & ISA_MIPS32R6) {
+ mask &= ~((1 << CP0Ca_WP) & val);
+ }
+
+ env->CP0_Cause = (env->CP0_Cause & ~mask) | (val & mask);
+
+ if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) {
+ if (env->CP0_Cause & (1 << CP0Ca_DC)) {
+ cpu_mips_stop_count(env);
+ } else {
+ cpu_mips_start_count(env);
+ }
+ }
+
+ /* Set/reset software interrupts */
+ for (i = 0 ; i < 2 ; i++) {
+ if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
+ cpu_mips_soft_irq(env, i, env->CP0_Cause & (1 << (CP0Ca_IP + i)));
+ }
+ }
+}
#endif
static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
@@ -840,3 +949,20 @@ void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra)
}
}
#endif
+
+void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
+ uint32_t exception,
+ int error_code,
+ uintptr_t pc)
+{
+ CPUState *cs = CPU(mips_env_get_cpu(env));
+
+ if (exception < EXCP_SC) {
+ qemu_log_mask(CPU_LOG_INT, "%s: %d %d\n",
+ __func__, exception, error_code);
+ }
+ cs->exception_index = exception;
+ env->error_code = error_code;
+
+ cpu_loop_exit_restore(cs, pc);
+}
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 950bc05b7c..a854e4de59 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -16,11 +16,11 @@
#include <linux/kvm.h>
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
-#include "cpu.h"
#include "sysemu/cpus.h"
#include "kvm_mips.h"
#include "exec/memattrs.h"
diff --git a/target-mips/machine.c b/target-mips/machine.c
index 22bca18145..7314cfe8c7 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -1,7 +1,9 @@
#include "qemu/osdep.h"
-#include "hw/hw.h"
-
+#include "qemu-common.h"
#include "cpu.h"
+#include "hw/hw.h"
+#include "cpu.h"
+#include "migration/cpu.h"
static int cpu_post_load(void *opaque, int version_id)
{
diff --git a/target-mips/mips-semi.c b/target-mips/mips-semi.c
index ed235de99d..a7aefbaefc 100644
--- a/target-mips/mips-semi.c
+++ b/target-mips/mips-semi.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "qemu/log.h"
#include "exec/helper-proto.h"
#include "exec/softmmu-semi.h"
#include "exec/semihost.h"
diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c
index 654a0d2728..ae92fcbe28 100644
--- a/target-mips/msa_helper.c
+++ b/target-mips/msa_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
/* Data format min and max values */
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index ba847ab3a0..7cf980748e 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -20,6 +20,7 @@
#include "cpu.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "sysemu/kvm.h"
diff --git a/target-mips/translate.c b/target-mips/translate.c
index ddfb9244d7..3bd96aae97 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c
index b4ee84e906..50a0899471 100644
--- a/target-moxie/cpu.c
+++ b/target-moxie/cpu.c
@@ -23,6 +23,7 @@
#include "qemu-common.h"
#include "migration/vmstate.h"
#include "machine.h"
+#include "exec/exec-all.h"
static void moxie_cpu_set_pc(CPUState *cs, vaddr value)
{
diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index 1b46e52c37..c10898eba7 100644
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -129,7 +129,6 @@ static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
}
#include "exec/cpu-all.h"
-#include "exec/exec-all.h"
static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
diff --git a/target-moxie/machine.c b/target-moxie/machine.c
index 912b79139a..282dcd869f 100644
--- a/target-moxie/machine.c
+++ b/target-moxie/machine.c
@@ -1,7 +1,10 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "machine.h"
+#include "migration/cpu.h"
const VMStateDescription vmstate_moxie_cpu = {
.name = "cpu",
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index ae6ed9e92c..155913f107 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -21,6 +21,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
{
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index ed818af0cf..810a280061 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -410,6 +410,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch)
#define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0
-#include "exec/exec-all.h"
-
#endif /* CPU_OPENRISC_H */
diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c
index ace3184d50..49470be051 100644
--- a/target-openrisc/exception.c
+++ b/target-openrisc/exception.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exception.h"
void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c
index edc301a7c5..cb16e76358 100644
--- a/target-openrisc/gdbstub.c
+++ b/target-openrisc/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
index 963eb14782..5fe3f11ffc 100644
--- a/target-openrisc/interrupt.c
+++ b/target-openrisc/interrupt.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "qemu/host-utils.h"
diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c
index 11b4b2056c..116f9109a7 100644
--- a/target-openrisc/interrupt_helper.c
+++ b/target-openrisc/interrupt_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
void HELPER(rfe)(CPUOpenRISCState *env)
diff --git a/target-openrisc/machine.c b/target-openrisc/machine.c
index b4dc08dfe1..17b0c77d6c 100644
--- a/target-openrisc/machine.c
+++ b/target-openrisc/machine.c
@@ -18,8 +18,11 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
+#include "migration/cpu.h"
static const VMStateDescription vmstate_env = {
.name = "env",
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index 4ab414a682..505dcdcdc8 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "qemu/host-utils.h"
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index d7952d449d..c0658c3868 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c
index f917be6bec..a719e452be 100644
--- a/target-openrisc/sys_helper.c
+++ b/target-openrisc/sys_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#define TO_SPR(group, number) (((group) << 11) + (number))
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 7d5e2b36a9..07358aadf3 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_PPC_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#ifdef TARGET_PPC64
#define TYPE_POWERPC_CPU "powerpc64-cpu"
@@ -39,6 +38,115 @@
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
typedef struct PowerPCCPU PowerPCCPU;
+typedef struct CPUPPCState CPUPPCState;
+typedef struct ppc_tb_t ppc_tb_t;
+typedef struct ppc_dcr_t ppc_dcr_t;
+
+/*****************************************************************************/
+/* MMU model */
+typedef enum powerpc_mmu_t powerpc_mmu_t;
+enum powerpc_mmu_t {
+ POWERPC_MMU_UNKNOWN = 0x00000000,
+ /* Standard 32 bits PowerPC MMU */
+ POWERPC_MMU_32B = 0x00000001,
+ /* PowerPC 6xx MMU with software TLB */
+ POWERPC_MMU_SOFT_6xx = 0x00000002,
+ /* PowerPC 74xx MMU with software TLB */
+ POWERPC_MMU_SOFT_74xx = 0x00000003,
+ /* PowerPC 4xx MMU with software TLB */
+ POWERPC_MMU_SOFT_4xx = 0x00000004,
+ /* PowerPC 4xx MMU with software TLB and zones protections */
+ POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
+ /* PowerPC MMU in real mode only */
+ POWERPC_MMU_REAL = 0x00000006,
+ /* Freescale MPC8xx MMU model */
+ POWERPC_MMU_MPC8xx = 0x00000007,
+ /* BookE MMU model */
+ POWERPC_MMU_BOOKE = 0x00000008,
+ /* BookE 2.06 MMU model */
+ POWERPC_MMU_BOOKE206 = 0x00000009,
+ /* PowerPC 601 MMU model (specific BATs format) */
+ POWERPC_MMU_601 = 0x0000000A,
+#define POWERPC_MMU_64 0x00010000
+#define POWERPC_MMU_1TSEG 0x00020000
+#define POWERPC_MMU_AMR 0x00040000
+ /* 64 bits PowerPC MMU */
+ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
+ /* Architecture 2.03 and later (has LPCR) */
+ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
+ /* Architecture 2.06 variant */
+ POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000003,
+ /* Architecture 2.06 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000003,
+ /* Architecture 2.07 variant */
+ POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000004,
+ /* Architecture 2.07 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000004,
+};
+
+/*****************************************************************************/
+/* Exception model */
+typedef enum powerpc_excp_t powerpc_excp_t;
+enum powerpc_excp_t {
+ POWERPC_EXCP_UNKNOWN = 0,
+ /* Standard PowerPC exception model */
+ POWERPC_EXCP_STD,
+ /* PowerPC 40x exception model */
+ POWERPC_EXCP_40x,
+ /* PowerPC 601 exception model */
+ POWERPC_EXCP_601,
+ /* PowerPC 602 exception model */
+ POWERPC_EXCP_602,
+ /* PowerPC 603 exception model */
+ POWERPC_EXCP_603,
+ /* PowerPC 603e exception model */
+ POWERPC_EXCP_603E,
+ /* PowerPC G2 exception model */
+ POWERPC_EXCP_G2,
+ /* PowerPC 604 exception model */
+ POWERPC_EXCP_604,
+ /* PowerPC 7x0 exception model */
+ POWERPC_EXCP_7x0,
+ /* PowerPC 7x5 exception model */
+ POWERPC_EXCP_7x5,
+ /* PowerPC 74xx exception model */
+ POWERPC_EXCP_74xx,
+ /* BookE exception model */
+ POWERPC_EXCP_BOOKE,
+ /* PowerPC 970 exception model */
+ POWERPC_EXCP_970,
+ /* POWER7 exception model */
+ POWERPC_EXCP_POWER7,
+ /* POWER8 exception model */
+ POWERPC_EXCP_POWER8,
+};
+
+/*****************************************************************************/
+/* Input pins model */
+typedef enum powerpc_input_t powerpc_input_t;
+enum powerpc_input_t {
+ PPC_FLAGS_INPUT_UNKNOWN = 0,
+ /* PowerPC 6xx bus */
+ PPC_FLAGS_INPUT_6xx,
+ /* BookE bus */
+ PPC_FLAGS_INPUT_BookE,
+ /* PowerPC 405 bus */
+ PPC_FLAGS_INPUT_405,
+ /* PowerPC 970 bus */
+ PPC_FLAGS_INPUT_970,
+ /* PowerPC POWER7 bus */
+ PPC_FLAGS_INPUT_POWER7,
+ /* PowerPC 401 bus */
+ PPC_FLAGS_INPUT_401,
+ /* Freescale RCPU bus */
+ PPC_FLAGS_INPUT_RCPU,
+};
+
+struct ppc_segment_page_sizes;
/**
* PowerPCCPUClass:
@@ -68,69 +176,14 @@ typedef struct PowerPCCPUClass {
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
-#if defined(TARGET_PPC64)
const struct ppc_segment_page_sizes *sps;
-#endif
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
-#if defined(CONFIG_SOFTMMU)
- int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
- int mmu_idx);
-#endif
+ int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
-/**
- * PowerPCCPU:
- * @env: #CPUPPCState
- * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
- * @max_compat: Maximal supported logical PVR from the command line
- * @cpu_version: Current logical PVR, zero if in "raw" mode
- *
- * A PowerPC CPU.
- */
-struct PowerPCCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUPPCState env;
- int cpu_dt_id;
- uint32_t max_compat;
- uint32_t cpu_version;
-};
-
-static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
-{
- return container_of(env, PowerPCCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(PowerPCCPU, env)
-
-PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
-PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
-
-void ppc_cpu_do_interrupt(CPUState *cpu);
-bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
- uint64_t *pval);
-hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
-void ppc_cpu_do_system_reset(CPUState *cs);
-extern const struct VMStateDescription vmstate_ppc_cpu;
-
typedef struct PPCTimebase {
uint64_t guest_timebase;
int64_t time_of_the_day_ns;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 508f03b74d..cd33539d1c 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -76,7 +76,7 @@
#define CPUArchState struct CPUPPCState
#include "exec/cpu-defs.h"
-
+#include "cpu-qom.h"
#include "fpu/softfloat.h"
#if defined (TARGET_PPC64)
@@ -85,93 +85,6 @@
#define PPC_ELF_MACHINE EM_PPC
#endif
-/*****************************************************************************/
-/* MMU model */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
-enum powerpc_mmu_t {
- POWERPC_MMU_UNKNOWN = 0x00000000,
- /* Standard 32 bits PowerPC MMU */
- POWERPC_MMU_32B = 0x00000001,
- /* PowerPC 6xx MMU with software TLB */
- POWERPC_MMU_SOFT_6xx = 0x00000002,
- /* PowerPC 74xx MMU with software TLB */
- POWERPC_MMU_SOFT_74xx = 0x00000003,
- /* PowerPC 4xx MMU with software TLB */
- POWERPC_MMU_SOFT_4xx = 0x00000004,
- /* PowerPC 4xx MMU with software TLB and zones protections */
- POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
- /* PowerPC MMU in real mode only */
- POWERPC_MMU_REAL = 0x00000006,
- /* Freescale MPC8xx MMU model */
- POWERPC_MMU_MPC8xx = 0x00000007,
- /* BookE MMU model */
- POWERPC_MMU_BOOKE = 0x00000008,
- /* BookE 2.06 MMU model */
- POWERPC_MMU_BOOKE206 = 0x00000009,
- /* PowerPC 601 MMU model (specific BATs format) */
- POWERPC_MMU_601 = 0x0000000A,
-#if defined(TARGET_PPC64)
-#define POWERPC_MMU_64 0x00010000
-#define POWERPC_MMU_1TSEG 0x00020000
-#define POWERPC_MMU_AMR 0x00040000
- /* 64 bits PowerPC MMU */
- POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
- /* Architecture 2.03 and later (has LPCR) */
- POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
- /* Architecture 2.06 variant */
- POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000003,
- /* Architecture 2.06 "degraded" (no 1T segments) */
- POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000003,
- /* Architecture 2.07 variant */
- POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000004,
- /* Architecture 2.07 "degraded" (no 1T segments) */
- POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000004,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
-/* Exception model */
-typedef enum powerpc_excp_t powerpc_excp_t;
-enum powerpc_excp_t {
- POWERPC_EXCP_UNKNOWN = 0,
- /* Standard PowerPC exception model */
- POWERPC_EXCP_STD,
- /* PowerPC 40x exception model */
- POWERPC_EXCP_40x,
- /* PowerPC 601 exception model */
- POWERPC_EXCP_601,
- /* PowerPC 602 exception model */
- POWERPC_EXCP_602,
- /* PowerPC 603 exception model */
- POWERPC_EXCP_603,
- /* PowerPC 603e exception model */
- POWERPC_EXCP_603E,
- /* PowerPC G2 exception model */
- POWERPC_EXCP_G2,
- /* PowerPC 604 exception model */
- POWERPC_EXCP_604,
- /* PowerPC 7x0 exception model */
- POWERPC_EXCP_7x0,
- /* PowerPC 7x5 exception model */
- POWERPC_EXCP_7x5,
- /* PowerPC 74xx exception model */
- POWERPC_EXCP_74xx,
- /* BookE exception model */
- POWERPC_EXCP_BOOKE,
-#if defined(TARGET_PPC64)
- /* PowerPC 970 exception model */
- POWERPC_EXCP_970,
- /* POWER7 exception model */
- POWERPC_EXCP_POWER7,
- /* POWER8 exception model */
- POWERPC_EXCP_POWER8,
-#endif /* defined(TARGET_PPC64) */
-};
-
/*****************************************************************************/
/* Exception vectors definitions */
enum {
@@ -297,27 +210,6 @@ enum {
POWERPC_EXCP_TRAP = 0x40,
};
-/*****************************************************************************/
-/* Input pins model */
-typedef enum powerpc_input_t powerpc_input_t;
-enum powerpc_input_t {
- PPC_FLAGS_INPUT_UNKNOWN = 0,
- /* PowerPC 6xx bus */
- PPC_FLAGS_INPUT_6xx,
- /* BookE bus */
- PPC_FLAGS_INPUT_BookE,
- /* PowerPC 405 bus */
- PPC_FLAGS_INPUT_405,
- /* PowerPC 970 bus */
- PPC_FLAGS_INPUT_970,
- /* PowerPC POWER7 bus */
- PPC_FLAGS_INPUT_POWER7,
- /* PowerPC 401 bus */
- PPC_FLAGS_INPUT_401,
- /* Freescale RCPU bus */
- PPC_FLAGS_INPUT_RCPU,
-};
-
#define PPC_INPUT(env) (env->bus_model)
/*****************************************************************************/
@@ -325,11 +217,8 @@ typedef struct opc_handler_t opc_handler_t;
/*****************************************************************************/
/* Types used to describe some PowerPC registers */
-typedef struct CPUPPCState CPUPPCState;
typedef struct DisasContext DisasContext;
-typedef struct ppc_tb_t ppc_tb_t;
typedef struct ppc_spr_t ppc_spr_t;
-typedef struct ppc_dcr_t ppc_dcr_t;
typedef union ppc_avr_t ppc_avr_t;
typedef union ppc_tlb_t ppc_tlb_t;
@@ -1215,7 +1104,57 @@ do { \
env->wdt_period[3] = (d_); \
} while (0)
-#include "cpu-qom.h"
+/**
+ * PowerPCCPU:
+ * @env: #CPUPPCState
+ * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
+ * @max_compat: Maximal supported logical PVR from the command line
+ * @cpu_version: Current logical PVR, zero if in "raw" mode
+ *
+ * A PowerPC CPU.
+ */
+struct PowerPCCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUPPCState env;
+ int cpu_dt_id;
+ uint32_t max_compat;
+ uint32_t cpu_version;
+};
+
+static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
+{
+ return container_of(env, PowerPCCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(PowerPCCPU, env)
+
+PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
+PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
+
+void ppc_cpu_do_interrupt(CPUState *cpu);
+bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
+ uint64_t *pval);
+hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+#ifndef CONFIG_USER_ONLY
+void ppc_cpu_do_system_reset(CPUState *cs);
+extern const struct VMStateDescription vmstate_ppc_cpu;
+#endif
/*****************************************************************************/
PowerPCCPU *cpu_ppc_init(const char *cpu_model);
@@ -2427,8 +2366,6 @@ static inline bool lsw_reg_in_range(int start, int nregs, int rx)
extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
-#include "exec/exec-all.h"
-
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
/**
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index ca4ffe8ad6..288903ee1d 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "helper_regs.h"
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 569c380cfa..7a338136a8 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
static int ppc_gdb_register_len_apple(int n)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 27b0258d31..74453763d6 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "crypto/aes.h"
diff --git a/target-ppc/kvm-stub.c b/target-ppc/kvm-stub.c
index 627bcb4322..efeafca1df 100644
--- a/target-ppc/kvm-stub.c
+++ b/target-ppc/kvm-stub.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "hw/ppc/openpic.h"
int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index c4c81467e4..24d6032007 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -24,11 +24,11 @@
#include "qemu-common.h"
#include "qemu/error-report.h"
+#include "cpu.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
-#include "cpu.h"
#include "sysemu/cpus.h"
#include "sysemu/device_tree.h"
#include "mmu-hash64.h"
diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 46684fb933..f6c7256974 100644
--- a/target-ppc/machine.c
+++ b/target-ppc/machine.c
@@ -1,9 +1,14 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "sysemu/kvm.h"
#include "helper_regs.h"
#include "mmu-hash64.h"
+#include "migration/cpu.h"
+#include "exec/exec-all.h"
static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
{
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index 6d584c9126..e4de86bc5e 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -18,10 +18,12 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "helper_regs.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
//#define DEBUG_OP
diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c
index 73e3b05833..7d41b017c8 100644
--- a/target-ppc/misc_helper.c
+++ b/target-ppc/misc_helper.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "helper_regs.h"
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index 39abb2fd39..29bace622a 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
@@ -383,7 +384,7 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index afbb9dd3d1..aaceacd4d7 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 72c4ab5d75..04e6932fa0 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
@@ -589,7 +590,7 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
return 0;
}
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
int rwx, int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 9bf8b9b267..6423b9f791 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -9,7 +9,7 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu);
int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
target_ulong esid, target_ulong vsid);
hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(PowerPCCPU *cpu, target_ulong index,
target_ulong pte0, target_ulong pte1);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index ff217941b5..2e0e3ca92c 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -24,6 +24,7 @@
#include "kvm_ppc.h"
#include "mmu-hash64.h"
#include "mmu-hash32.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/log.h"
diff --git a/target-ppc/timebase_helper.c b/target-ppc/timebase_helper.c
index 3b340d70d1..66de3137e4 100644
--- a/target-ppc/timebase_helper.c
+++ b/target-ppc/timebase_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "qemu/log.h"
/*****************************************************************************/
/* SPR accesses */
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d485d7c7cb..745f4de98f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/host-utils.h"
#include "exec/cpu_ldst.h"
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index f51572552b..954195f5e4 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -31,29 +31,13 @@
#include "qemu/error-report.h"
#include "qapi/visitor.h"
#include "hw/qdev-properties.h"
+#include "hw/ppc/ppc.h"
//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
//#define PPC_DUMP_SPR_ACCESSES
/* #define USE_APPLE_GDB */
-/* For user-mode emulation, we don't emulate any IRQ controller */
-#if defined(CONFIG_USER_ONLY)
-#define PPC_IRQ_INIT_FN(name) \
-static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \
-{ \
-}
-#else
-#define PPC_IRQ_INIT_FN(name) \
-void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
-#endif
-
-PPC_IRQ_INIT_FN(40x);
-PPC_IRQ_INIT_FN(6xx);
-PPC_IRQ_INIT_FN(970);
-PPC_IRQ_INIT_FN(POWER7);
-PPC_IRQ_INIT_FN(e500);
-
/* Generic callbacks:
* do nothing but store/retrieve spr value
*/
@@ -3275,7 +3259,7 @@ static void init_proc_401 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3329,7 +3313,7 @@ static void init_proc_401x2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3381,7 +3365,7 @@ static void init_proc_401x3 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3440,7 +3424,7 @@ static void init_proc_IOP480 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3491,7 +3475,7 @@ static void init_proc_403 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3557,7 +3541,7 @@ static void init_proc_403GCX (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3623,7 +3607,7 @@ static void init_proc_405 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3721,7 +3705,7 @@ static void init_proc_440EP (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -3991,7 +3975,7 @@ static void init_proc_440x5 (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -4413,7 +4397,7 @@ static void init_proc_G2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2)(ObjectClass *oc, void *data)
@@ -4492,7 +4476,7 @@ static void init_proc_G2LE (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2LE)(ObjectClass *oc, void *data)
@@ -4745,7 +4729,7 @@ static void init_proc_e300 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
@@ -5000,7 +4984,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
init_excp_e200(env, ivpr_mask);
/* Allocate hardware IRQ controller */
- ppce500_irq_init(env);
+ ppce500_irq_init(ppc_env_get_cpu(env));
}
static void init_proc_e500v1(CPUPPCState *env)
@@ -5244,7 +5228,7 @@ static void init_proc_601 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 64;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
@@ -5348,7 +5332,7 @@ static void init_proc_602 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(602)(ObjectClass *oc, void *data)
@@ -5417,7 +5401,7 @@ static void init_proc_603 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603)(ObjectClass *oc, void *data)
@@ -5483,7 +5467,7 @@ static void init_proc_603E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
@@ -5543,7 +5527,7 @@ static void init_proc_604 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604)(ObjectClass *oc, void *data)
@@ -5626,7 +5610,7 @@ static void init_proc_604E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604E)(ObjectClass *oc, void *data)
@@ -5696,7 +5680,7 @@ static void init_proc_740 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(740)(ObjectClass *oc, void *data)
@@ -5774,7 +5758,7 @@ static void init_proc_750 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750)(ObjectClass *oc, void *data)
@@ -5937,7 +5921,7 @@ static void init_proc_750cl (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data)
@@ -6057,7 +6041,7 @@ static void init_proc_750cx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data)
@@ -6144,7 +6128,7 @@ static void init_proc_750fx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data)
@@ -6231,7 +6215,7 @@ static void init_proc_750gx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data)
@@ -6309,7 +6293,7 @@ static void init_proc_745 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(745)(ObjectClass *oc, void *data)
@@ -6395,7 +6379,7 @@ static void init_proc_755 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(755)(ObjectClass *oc, void *data)
@@ -6464,7 +6448,7 @@ static void init_proc_7400 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7400)(ObjectClass *oc, void *data)
@@ -6548,7 +6532,7 @@ static void init_proc_7410 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7410)(ObjectClass *oc, void *data)
@@ -6658,7 +6642,7 @@ static void init_proc_7440 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7440)(ObjectClass *oc, void *data)
@@ -6791,7 +6775,7 @@ static void init_proc_7450 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7450)(ObjectClass *oc, void *data)
@@ -6927,7 +6911,7 @@ static void init_proc_7445 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7445)(ObjectClass *oc, void *data)
@@ -7065,7 +7049,7 @@ static void init_proc_7455 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7455)(ObjectClass *oc, void *data)
@@ -7227,7 +7211,7 @@ static void init_proc_7457 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7457)(ObjectClass *oc, void *data)
@@ -7364,7 +7348,7 @@ static void init_proc_e600 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
@@ -8118,12 +8102,12 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
case BOOK3S_CPU_970:
case BOOK3S_CPU_POWER5PLUS:
init_excp_970(env);
- ppc970_irq_init(env);
+ ppc970_irq_init(ppc_env_get_cpu(env));
break;
case BOOK3S_CPU_POWER7:
case BOOK3S_CPU_POWER8:
init_excp_POWER7(env);
- ppcPOWER7_irq_init(env);
+ ppcPOWER7_irq_init(ppc_env_get_cpu(env));
break;
default:
g_assert_not_reached();
diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c
index 0d9411bdf3..1cf855133e 100644
--- a/target-s390x/cc_helper.c
+++ b/target-s390x/cc_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
diff --git a/target-s390x/cpu-qom.h b/target-s390x/cpu-qom.h
index 1c90933965..66b5d1808f 100644
--- a/target-s390x/cpu-qom.h
+++ b/target-s390x/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_S390_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_S390_CPU "s390-cpu"
@@ -56,49 +55,6 @@ typedef struct S390CPUClass {
void (*initial_cpu_reset)(CPUState *cpu);
} S390CPUClass;
-/**
- * S390CPU:
- * @env: #CPUS390XState.
- *
- * An S/390 CPU.
- */
-typedef struct S390CPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUS390XState env;
- int64_t id;
- /* needed for live migration */
- void *irqstate;
- uint32_t irqstate_saved_size;
-} S390CPU;
-
-static inline S390CPU *s390_env_get_cpu(CPUS390XState *env)
-{
- return container_of(env, S390CPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(s390_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(S390CPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_s390_cpu;
-#endif
-
-void s390_cpu_do_interrupt(CPUState *cpu);
-bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void s390_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-int s390_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
-
-hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr);
-int s390_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void s390_cpu_gdb_init(CPUState *cs);
-void s390x_cpu_debug_excp_handler(CPUState *cs);
+typedef struct S390CPU S390CPU;
#endif
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 4bfff341dc..e43e2d6155 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -30,10 +30,12 @@
#include "qemu/cutils.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
-#include "hw/hw.h"
#include "trace.h"
#include "qapi/visitor.h"
+#include "migration/vmstate.h"
+#include "exec/exec-all.h"
#ifndef CONFIG_USER_ONLY
+#include "hw/hw.h"
#include "sysemu/arch_init.h"
#include "sysemu/sysemu.h"
#include "hw/s390x/sclp.h"
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 996b79023e..bd6b2e57ef 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -23,6 +23,7 @@
#define CPU_S390X_H
#include "qemu-common.h"
+#include "cpu-qom.h"
#define TARGET_LONG_BITS 64
@@ -173,7 +174,51 @@ static inline CPU_DoubleU *get_freg(CPUS390XState *cs, int nr)
return &cs->vregs[nr][0];
}
-#include "cpu-qom.h"
+/**
+ * S390CPU:
+ * @env: #CPUS390XState.
+ *
+ * An S/390 CPU.
+ */
+struct S390CPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUS390XState env;
+ int64_t id;
+ /* needed for live migration */
+ void *irqstate;
+ uint32_t irqstate_saved_size;
+};
+
+static inline S390CPU *s390_env_get_cpu(CPUS390XState *env)
+{
+ return container_of(env, S390CPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(s390_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(S390CPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_s390_cpu;
+#endif
+
+void s390_cpu_do_interrupt(CPUState *cpu);
+bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void s390_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+int s390_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+
+hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr);
+int s390_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void s390_cpu_gdb_init(CPUState *cs);
+void s390x_cpu_debug_excp_handler(CPUState *cs);
+
#include <sysemu/kvm.h>
/* distinguish between 24 bit and 31 bit addressing */
@@ -428,8 +473,6 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo,
int s390_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
int mmu_idx);
-#include "ioinst.h"
-
#ifndef CONFIG_USER_ONLY
void do_restart_interrupt(CPUS390XState *env);
@@ -540,6 +583,26 @@ static inline uint8_t s390_cpu_get_state(S390CPU *cpu)
void gtod_save(QEMUFile *f, void *opaque);
int gtod_load(QEMUFile *f, void *opaque, int version_id);
+void cpu_inject_ext(S390CPU *cpu, uint32_t code, uint32_t param,
+ uint64_t param64);
+
+/* ioinst.c */
+void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1);
+void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1);
+void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1);
+void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
+void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
+void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb);
+void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
+int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb);
+void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb);
+int ioinst_handle_tpi(S390CPU *cpu, uint32_t ipb);
+void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2,
+ uint32_t ipb);
+void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1);
+void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1);
+void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1);
+
/* service interrupts are floating therefore we must not pass an cpustate */
void s390_sclp_extint(uint32_t parm);
@@ -561,35 +624,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
void cpu_lock(void);
void cpu_unlock(void);
-typedef struct SubchDev SubchDev;
-
-#ifndef CONFIG_USER_ONLY
extern void subsystem_reset(void);
-SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
- uint16_t schid);
-bool css_subch_visible(SubchDev *sch);
-void css_conditional_io_interrupt(SubchDev *sch);
-int css_do_stsch(SubchDev *sch, SCHIB *schib);
-bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);
-int css_do_msch(SubchDev *sch, const SCHIB *schib);
-int css_do_xsch(SubchDev *sch);
-int css_do_csch(SubchDev *sch);
-int css_do_hsch(SubchDev *sch);
-int css_do_ssch(SubchDev *sch, ORB *orb);
-int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len);
-void css_do_tsch_update_subch(SubchDev *sch);
-int css_do_stcrw(CRW *crw);
-void css_undo_stcrw(CRW *crw);
-int css_do_tpi(IOIntCode *int_code, int lowcore);
-int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
- int rfmt, void *buf);
-void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo);
-int css_enable_mcsse(void);
-int css_enable_mss(void);
-int css_do_rsch(SubchDev *sch);
-int css_do_rchp(uint8_t cssid, uint8_t chpid);
-bool css_present(uint8_t cssid);
-#endif
#define cpu_init(model) CPU(cpu_s390x_init(model))
#define cpu_exec cpu_s390x_exec
@@ -598,8 +633,6 @@ bool css_present(uint8_t cssid);
void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
#define cpu_list s390_cpu_list
-#include "exec/exec-all.h"
-
#define EXCP_EXT 1 /* external interrupt */
#define EXCP_SVC 2 /* supervisor call (syscall) */
#define EXCP_PGM 3 /* program interruption */
@@ -1064,69 +1097,6 @@ static inline uint64_t tod2time(uint64_t t) {
return (t * 125) >> 9;
}
-static inline void cpu_inject_ext(S390CPU *cpu, uint32_t code, uint32_t param,
- uint64_t param64)
-{
- CPUS390XState *env = &cpu->env;
-
- if (env->ext_index == MAX_EXT_QUEUE - 1) {
- /* ugh - can't queue anymore. Let's drop. */
- return;
- }
-
- env->ext_index++;
- assert(env->ext_index < MAX_EXT_QUEUE);
-
- env->ext_queue[env->ext_index].code = code;
- env->ext_queue[env->ext_index].param = param;
- env->ext_queue[env->ext_index].param64 = param64;
-
- env->pending_int |= INTERRUPT_EXT;
- cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
-}
-
-static inline void cpu_inject_io(S390CPU *cpu, uint16_t subchannel_id,
- uint16_t subchannel_number,
- uint32_t io_int_parm, uint32_t io_int_word)
-{
- CPUS390XState *env = &cpu->env;
- int isc = IO_INT_WORD_ISC(io_int_word);
-
- if (env->io_index[isc] == MAX_IO_QUEUE - 1) {
- /* ugh - can't queue anymore. Let's drop. */
- return;
- }
-
- env->io_index[isc]++;
- assert(env->io_index[isc] < MAX_IO_QUEUE);
-
- env->io_queue[env->io_index[isc]][isc].id = subchannel_id;
- env->io_queue[env->io_index[isc]][isc].nr = subchannel_number;
- env->io_queue[env->io_index[isc]][isc].parm = io_int_parm;
- env->io_queue[env->io_index[isc]][isc].word = io_int_word;
-
- env->pending_int |= INTERRUPT_IO;
- cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
-}
-
-static inline void cpu_inject_crw_mchk(S390CPU *cpu)
-{
- CPUS390XState *env = &cpu->env;
-
- if (env->mchk_index == MAX_MCHK_QUEUE - 1) {
- /* ugh - can't queue anymore. Let's drop. */
- return;
- }
-
- env->mchk_index++;
- assert(env->mchk_index < MAX_MCHK_QUEUE);
-
- env->mchk_queue[env->mchk_index].type = 1;
-
- env->pending_int |= INTERRUPT_MCHK;
- cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
-}
-
/* from s390-virtio-ccw */
#define MEM_SECTION_SIZE 0x10000000UL
#define MAX_AVAIL_SLOTS 32
@@ -1271,32 +1241,6 @@ static inline void s390_crypto_reset(void)
}
}
-#ifdef CONFIG_KVM
-static inline bool vregs_needed(void *opaque)
-{
- if (kvm_enabled()) {
- return kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS);
- }
- return 0;
-}
-static inline bool riccb_needed(void *opaque)
-{
- if (kvm_enabled()) {
- return kvm_s390_get_ri();
- }
- return 0;
-}
-#else
-static inline bool vregs_needed(void *opaque)
-{
- return 0;
-}
-static inline bool riccb_needed(void *opaque)
-{
- return 0;
-}
-#endif
-
/* machine check interruption code */
/* subclasses */
diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c
index 1c7f673542..4ddb388392 100644
--- a/target-s390x/fpu_helper.c
+++ b/target-s390x/fpu_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/helper-proto.h"
diff --git a/target-s390x/gdbstub.c b/target-s390x/gdbstub.c
index 9fc36cb54e..3d223dec97 100644
--- a/target-s390x/gdbstub.c
+++ b/target-s390x/gdbstub.c
@@ -19,6 +19,8 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "qemu/bitops.h"
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 92abe7e676..ad8f7978ea 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -23,7 +23,9 @@
#include "cpu.h"
#include "exec/gdbstub.h"
#include "qemu/timer.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
+#include "hw/s390x/ioinst.h"
#ifndef CONFIG_USER_ONLY
#include "sysemu/sysemu.h"
#endif
diff --git a/target-s390x/int_helper.c b/target-s390x/int_helper.c
index cc1071eeaf..370c94da55 100644
--- a/target-s390x/int_helper.c
+++ b/target-s390x/int_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
diff --git a/target-s390x/interrupt.c b/target-s390x/interrupt.c
index bad60a7e13..9edef96795 100644
--- a/target-s390x/interrupt.c
+++ b/target-s390x/interrupt.c
@@ -10,13 +10,77 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "sysemu/kvm.h"
+#include "hw/s390x/ioinst.h"
+
+#if !defined(CONFIG_USER_ONLY)
+void cpu_inject_ext(S390CPU *cpu, uint32_t code, uint32_t param,
+ uint64_t param64)
+{
+ CPUS390XState *env = &cpu->env;
+
+ if (env->ext_index == MAX_EXT_QUEUE - 1) {
+ /* ugh - can't queue anymore. Let's drop. */
+ return;
+ }
+
+ env->ext_index++;
+ assert(env->ext_index < MAX_EXT_QUEUE);
+
+ env->ext_queue[env->ext_index].code = code;
+ env->ext_queue[env->ext_index].param = param;
+ env->ext_queue[env->ext_index].param64 = param64;
+
+ env->pending_int |= INTERRUPT_EXT;
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
+}
+
+static void cpu_inject_io(S390CPU *cpu, uint16_t subchannel_id,
+ uint16_t subchannel_number,
+ uint32_t io_int_parm, uint32_t io_int_word)
+{
+ CPUS390XState *env = &cpu->env;
+ int isc = IO_INT_WORD_ISC(io_int_word);
+
+ if (env->io_index[isc] == MAX_IO_QUEUE - 1) {
+ /* ugh - can't queue anymore. Let's drop. */
+ return;
+ }
+
+ env->io_index[isc]++;
+ assert(env->io_index[isc] < MAX_IO_QUEUE);
+
+ env->io_queue[env->io_index[isc]][isc].id = subchannel_id;
+ env->io_queue[env->io_index[isc]][isc].nr = subchannel_number;
+ env->io_queue[env->io_index[isc]][isc].parm = io_int_parm;
+ env->io_queue[env->io_index[isc]][isc].word = io_int_word;
+
+ env->pending_int |= INTERRUPT_IO;
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
+}
+
+static void cpu_inject_crw_mchk(S390CPU *cpu)
+{
+ CPUS390XState *env = &cpu->env;
+
+ if (env->mchk_index == MAX_MCHK_QUEUE - 1) {
+ /* ugh - can't queue anymore. Let's drop. */
+ return;
+ }
+
+ env->mchk_index++;
+ assert(env->mchk_index < MAX_MCHK_QUEUE);
+
+ env->mchk_queue[env->mchk_index].type = 1;
+
+ env->pending_int |= INTERRUPT_MCHK;
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD);
+}
/*
* All of the following interrupts are floating, i.e. not per-vcpu.
* We just need a dummy cpustate in order to be able to inject in the
* non-kvm case.
*/
-#if !defined(CONFIG_USER_ONLY)
void s390_sclp_extint(uint32_t parm)
{
if (kvm_enabled()) {
diff --git a/target-s390x/ioinst.c b/target-s390x/ioinst.c
index f5498aa023..a5a288bec5 100644
--- a/target-s390x/ioinst.c
+++ b/target-s390x/ioinst.c
@@ -12,7 +12,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "ioinst.h"
+#include "hw/s390x/ioinst.h"
#include "trace.h"
#include "hw/s390x/s390-pci-bus.h"
diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c
index 55ae6d3304..8f46fd0f10 100644
--- a/target-s390x/kvm.c
+++ b/target-s390x/kvm.c
@@ -29,12 +29,12 @@
#include <asm/ptrace.h>
#include "qemu-common.h"
+#include "cpu.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "hw/hw.h"
-#include "cpu.h"
#include "sysemu/device_tree.h"
#include "qapi/qmp/qjson.h"
#include "exec/gdbstub.h"
diff --git a/target-s390x/machine.c b/target-s390x/machine.c
index a30b16fe3d..aa39e5daa4 100644
--- a/target-s390x/machine.c
+++ b/target-s390x/machine.c
@@ -76,6 +76,16 @@ static const VMStateDescription vmstate_fpu = {
}
};
+static bool vregs_needed(void *opaque)
+{
+#ifdef CONFIG_KVM
+ if (kvm_enabled()) {
+ return kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS);
+ }
+#endif
+ return 0;
+}
+
static const VMStateDescription vmstate_vregs = {
.name = "cpu/vregs",
.version_id = 1,
@@ -135,6 +145,16 @@ static const VMStateDescription vmstate_vregs = {
}
};
+static bool riccb_needed(void *opaque)
+{
+#ifdef CONFIG_KVM
+ if (kvm_enabled()) {
+ return kvm_s390_get_ri();
+ }
+#endif
+ return 0;
+}
+
const VMStateDescription vmstate_riccb = {
.name = "cpu/riccb",
.version_id = 1,
diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
index 7078622030..ec8059a264 100644
--- a/target-s390x/mem_helper.c
+++ b/target-s390x/mem_helper.c
@@ -21,8 +21,12 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
+
+#if !defined(CONFIG_USER_ONLY)
#include "hw/s390x/storage-keys.h"
+#endif
/*****************************************************************************/
/* Softmmu support */
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index 462cfc85fc..86da1947b9 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -29,10 +29,11 @@
#ifdef CONFIG_KVM
#include <linux/kvm.h>
#endif
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
-#include "hw/watchdog/wdt_diag288.h"
#if !defined(CONFIG_USER_ONLY)
+#include "hw/watchdog/wdt_diag288.h"
#include "sysemu/cpus.h"
#include "sysemu/sysemu.h"
#include "hw/s390x/ebcdic.h"
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index e99eb5cb01..2bbd1020c9 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -31,6 +31,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/log.h"
#include "qemu/host-utils.h"
diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h
index 6341238aa1..01abb206e4 100644
--- a/target-sh4/cpu-qom.h
+++ b/target-sh4/cpu-qom.h
@@ -60,35 +60,6 @@ typedef struct SuperHCPUClass {
uint32_t cvr;
} SuperHCPUClass;
-/**
- * SuperHCPU:
- * @env: #CPUSH4State
- *
- * A SuperH CPU.
- */
-typedef struct SuperHCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUSH4State env;
-} SuperHCPU;
-
-static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
-{
- return container_of(env, SuperHCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(SuperHCPU, env)
-
-void superh_cpu_do_interrupt(CPUState *cpu);
-bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void superh_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+typedef struct SuperHCPU SuperHCPU;
#endif
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index 86ba38808b..794b625d8e 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -24,6 +24,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static void superh_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 10c0191795..3f5c689eb3 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -20,6 +20,7 @@
#define _CPU_SH4_H
#include "qemu-common.h"
+#include "cpu-qom.h"
#define TARGET_LONG_BITS 32
@@ -187,7 +188,36 @@ typedef struct CPUSH4State {
memory_content **movcal_backup_tail;
} CPUSH4State;
-#include "cpu-qom.h"
+/**
+ * SuperHCPU:
+ * @env: #CPUSH4State
+ *
+ * A SuperH CPU.
+ */
+struct SuperHCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUSH4State env;
+};
+
+static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
+{
+ return container_of(env, SuperHCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(SuperHCPU, env)
+
+void superh_cpu_do_interrupt(CPUState *cpu);
+bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void superh_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void sh4_translate_init(void);
SuperHCPU *cpu_sh4_init(const char *cpu_model);
@@ -359,6 +389,4 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
| (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
}
-#include "exec/exec-all.h"
-
#endif /* _CPU_SH4_H */
diff --git a/target-sh4/gdbstub.c b/target-sh4/gdbstub.c
index 1b59ea8c73..13bea00d7d 100644
--- a/target-sh4/gdbstub.c
+++ b/target-sh4/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 6438338f24..a33ac697c5 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/log.h"
#if !defined(CONFIG_USER_ONLY)
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 368e687d68..303e83e7e5 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 53f782c054..ff5222b04e 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -22,6 +22,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h
index 5096b10472..f63af728ee 100644
--- a/target-sparc/cpu-qom.h
+++ b/target-sparc/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_SPARC_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#ifdef TARGET_SPARC64
#define TYPE_SPARC_CPU "sparc64-cpu"
@@ -52,41 +51,6 @@ typedef struct SPARCCPUClass {
void (*parent_reset)(CPUState *cpu);
} SPARCCPUClass;
-/**
- * SPARCCPU:
- * @env: #CPUSPARCState
- *
- * A SPARC CPU.
- */
-typedef struct SPARCCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUSPARCState env;
-} SPARCCPU;
-
-static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env)
-{
- return container_of(env, SPARCCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(SPARCCPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_sparc_cpu;
-#endif
-
-void sparc_cpu_do_interrupt(CPUState *cpu);
-void sparc_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu,
- vaddr addr, int is_write,
- int is_user, uintptr_t retaddr);
+typedef struct SPARCCPU SPARCCPU;
#endif
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index fe4119e2bc..5b74cfcd31 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -21,6 +21,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu/error-report.h"
+#include "exec/exec-all.h"
//#define DEBUG_FEATURES
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 59ec7cafbe..ba37f4b94e 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -3,6 +3,7 @@
#include "qemu-common.h"
#include "qemu/bswap.h"
+#include "cpu-qom.h"
#define ALIGNED_ONLY
@@ -506,7 +507,42 @@ struct CPUSPARCState {
uint32_t cache_control;
};
-#include "cpu-qom.h"
+/**
+ * SPARCCPU:
+ * @env: #CPUSPARCState
+ *
+ * A SPARC CPU.
+ */
+struct SPARCCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUSPARCState env;
+};
+
+static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env)
+{
+ return container_of(env, SPARCCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(SPARCCPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_sparc_cpu;
+#endif
+
+void sparc_cpu_do_interrupt(CPUState *cpu);
+void sparc_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu,
+ vaddr addr, int is_write,
+ int is_user, uintptr_t retaddr);
#ifndef NO_CPU_IO_DEFS
/* cpu_init.c */
@@ -732,6 +768,4 @@ static inline bool tb_am_enabled(int tb_flags)
#endif
}
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-sparc/gdbstub.c b/target-sparc/gdbstub.c
index e530dc52f5..ffc2baa2e7 100644
--- a/target-sparc/gdbstub.c
+++ b/target-sparc/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
#ifdef TARGET_ABI32
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 8349cbe2cc..bedc6722a1 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "sysemu/sysemu.h"
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 658e7d8585..f73cf6deaa 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
//#define DEBUG_MMU
diff --git a/target-sparc/machine.c b/target-sparc/machine.c
index 1046016f3a..59c92f7582 100644
--- a/target-sparc/machine.c
+++ b/target-sparc/machine.c
@@ -1,9 +1,15 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "qemu/timer.h"
#include "cpu.h"
+#include "exec/exec-all.h"
+#include "migration/cpu.h"
+#include "exec/exec-all.h"
#ifdef TARGET_SPARC64
static const VMStateDescription vmstate_cpu_timer = {
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index aa80c4829b..32b629fb0d 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "trace.h"
#include "exec/address-spaces.h"
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index d154e3f7b6..21760b9fea 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "disas/disas.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c
index d2d0912034..7017cb6e1a 100644
--- a/target-tilegx/cpu.c
+++ b/target-tilegx/cpu.c
@@ -25,6 +25,7 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "linux-user/syscall_defs.h"
+#include "exec/exec-all.h"
static void tilegx_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf, int flags)
diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index c9dda127c9..b9b588de53 100644
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -176,6 +176,4 @@ static inline void cpu_get_tb_cpu_state(CPUTLGState *env, target_ulong *pc,
*flags = 0;
}
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-tilegx/helper.c b/target-tilegx/helper.c
index 616c5c7cfa..b4fba9cc21 100644
--- a/target-tilegx/helper.c
+++ b/target-tilegx/helper.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu-common.h"
#include "exec/helper-proto.h"
#include <zlib.h> /* For crc32 */
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 03918ebd5d..bdea673e5b 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -23,6 +23,7 @@
#include "qemu/log.h"
#include "exec/log.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
#include "linux-user/syscall_defs.h"
diff --git a/target-tricore/cpu-qom.h b/target-tricore/cpu-qom.h
index 66c9664745..399c98f2d6 100644
--- a/target-tricore/cpu-qom.h
+++ b/target-tricore/cpu-qom.h
@@ -39,32 +39,6 @@ typedef struct TriCoreCPUClass {
void (*parent_reset)(CPUState *cpu);
} TriCoreCPUClass;
-/**
- * TriCoreCPU:
- * @env: #CPUTriCoreState
- *
- * A TriCore CPU.
- */
-typedef struct TriCoreCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUTriCoreState env;
-} TriCoreCPU;
-
-static inline TriCoreCPU *tricore_env_get_cpu(CPUTriCoreState *env)
-{
- return TRICORE_CPU(container_of(env, TriCoreCPU, env));
-}
-
-#define ENV_GET_CPU(e) CPU(tricore_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(TriCoreCPU, env)
-
-hwaddr tricore_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-void tricore_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-
+typedef struct TriCoreCPU TriCoreCPU;
#endif /*QEMU_TRICORE_CPU_QOM_H */
diff --git a/target-tricore/cpu.c b/target-tricore/cpu.c
index 69fca8c068..35d4ee4dea 100644
--- a/target-tricore/cpu.c
+++ b/target-tricore/cpu.c
@@ -21,6 +21,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
static inline void set_feature(CPUTriCoreState *env, int feature)
{
diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h
index eaebdd28e6..3c6f7b75b8 100644
--- a/target-tricore/cpu.h
+++ b/target-tricore/cpu.h
@@ -21,6 +21,7 @@
#include "tricore-defs.h"
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -198,6 +199,34 @@ struct CPUTriCoreState {
struct QEMUTimer *timer; /* Internal timer */
};
+/**
+ * TriCoreCPU:
+ * @env: #CPUTriCoreState
+ *
+ * A TriCore CPU.
+ */
+struct TriCoreCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUTriCoreState env;
+};
+
+static inline TriCoreCPU *tricore_env_get_cpu(CPUTriCoreState *env)
+{
+ return TRICORE_CPU(container_of(env, TriCoreCPU, env));
+}
+
+#define ENV_GET_CPU(e) CPU(tricore_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(TriCoreCPU, env)
+
+hwaddr tricore_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+void tricore_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+
+
#define MASK_PCXI_PCPN 0xff000000
#define MASK_PCXI_PIE 0x00800000
#define MASK_PCXI_UL 0x00400000
@@ -341,7 +370,6 @@ void psw_write(CPUTriCoreState *env, uint32_t val);
void fpu_set_state(CPUTriCoreState *env);
-#include "cpu-qom.h"
#define MMU_USER_IDX 2
void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf);
@@ -394,6 +422,4 @@ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
int rw, int mmu_idx);
#define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault
-#include "exec/exec-all.h"
-
#endif /*__TRICORE_CPU_H__ */
diff --git a/target-tricore/helper.c b/target-tricore/helper.c
index 71b31cdb9b..3118905eca 100644
--- a/target-tricore/helper.c
+++ b/target-tricore/helper.c
@@ -18,6 +18,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
enum {
TLBRET_DIRTY = -4,
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 40656c357c..a73ed530f6 100644
--- a/target-tricore/op_helper.c
+++ b/target-tricore/op_helper.c
@@ -18,6 +18,7 @@
#include "cpu.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include <zlib.h> /* for crc32 */
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 2d17aebaa3..83fa4fcd54 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"
diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h
index ea65b83318..bc68e78045 100644
--- a/target-unicore32/cpu-qom.h
+++ b/target-unicore32/cpu-qom.h
@@ -12,7 +12,6 @@
#define QEMU_UC32_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_UNICORE32_CPU "unicore32-cpu"
@@ -37,33 +36,6 @@ typedef struct UniCore32CPUClass {
DeviceRealize parent_realize;
} UniCore32CPUClass;
-/**
- * UniCore32CPU:
- * @env: #CPUUniCore32State
- *
- * A UniCore32 CPU.
- */
-typedef struct UniCore32CPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUUniCore32State env;
-} UniCore32CPU;
-
-static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env)
-{
- return container_of(env, UniCore32CPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(UniCore32CPU, env)
-
-void uc32_cpu_do_interrupt(CPUState *cpu);
-bool uc32_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void uc32_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr uc32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+typedef struct UniCore32CPU UniCore32CPU;
#endif
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index 66f43acfff..3990433eb8 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -17,6 +17,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static void uc32_cpu_set_pc(CPUState *cs, vaddr value)
{
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index e64cb7ecdd..f3e877bbc0 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -20,6 +20,7 @@
#define CPUArchState struct CPUUniCore32State
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -71,6 +72,35 @@ typedef struct CPUUniCore32State {
} CPUUniCore32State;
+/**
+ * UniCore32CPU:
+ * @env: #CPUUniCore32State
+ *
+ * A UniCore32 CPU.
+ */
+struct UniCore32CPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUUniCore32State env;
+};
+
+static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env)
+{
+ return container_of(env, UniCore32CPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(UniCore32CPU, env)
+
+void uc32_cpu_do_interrupt(CPUState *cpu);
+bool uc32_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void uc32_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr uc32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+
#define ASR_M (0x1f)
#define ASR_MODE_USER (0x10)
#define ASR_MODE_INTR (0x12)
@@ -134,8 +164,6 @@ static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch)
}
#include "exec/cpu-all.h"
-#include "cpu-qom.h"
-#include "exec/exec-all.h"
int uc32_cpu_exec(CPUState *s);
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index 21f5f35744..d603bde237 100644
--- a/target-unicore32/helper.c
+++ b/target-unicore32/helper.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c
index f5847307a3..a782d33843 100644
--- a/target-unicore32/op_helper.c
+++ b/target-unicore32/op_helper.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#define SIGNBIT (uint32_t)0x80000000
diff --git a/target-unicore32/softmmu.c b/target-unicore32/softmmu.c
index d267fed875..a34026a524 100644
--- a/target-unicore32/softmmu.c
+++ b/target-unicore32/softmmu.c
@@ -14,6 +14,7 @@
#include "qemu/osdep.h"
#include <cpu.h>
+#include "exec/exec-all.h"
#undef DEBUG_UC32
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 307f7b2059..b04d22c9fb 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -12,6 +12,7 @@
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/log.h"
#include "exec/cpu_ldst.h"
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h
index 2258224d09..403bd95721 100644
--- a/target-xtensa/cpu-qom.h
+++ b/target-xtensa/cpu-qom.h
@@ -30,7 +30,6 @@
#define QEMU_XTENSA_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_XTENSA_CPU "xtensa-cpu"
@@ -41,6 +40,8 @@
#define XTENSA_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU)
+typedef struct XtensaConfig XtensaConfig;
+
/**
* XtensaCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -60,40 +61,6 @@ typedef struct XtensaCPUClass {
const XtensaConfig *config;
} XtensaCPUClass;
-/**
- * XtensaCPU:
- * @env: #CPUXtensaState
- *
- * An Xtensa CPU.
- */
-typedef struct XtensaCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUXtensaState env;
-} XtensaCPU;
-
-static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
-{
- return container_of(env, XtensaCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(XtensaCPU, env)
-
-void xtensa_cpu_do_interrupt(CPUState *cpu);
-bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
-void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
- bool is_write, bool is_exec, int opaque,
- unsigned size);
-void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+typedef struct XtensaCPU XtensaCPU;
#endif
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 01b251fdc7..5ad08a2799 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -33,6 +33,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
+#include "exec/exec-all.h"
static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 7bfc9c841d..442176a2b2 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -34,6 +34,7 @@
#define CPUArchState struct CPUXtensaState
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -296,7 +297,7 @@ typedef struct XtensaGdbRegmap {
XtensaGdbReg reg[1 + 16 + 64 + 256 + 256];
} XtensaGdbRegmap;
-typedef struct XtensaConfig {
+struct XtensaConfig {
const char *name;
uint64_t options;
XtensaGdbRegmap gdb_regmap;
@@ -329,7 +330,7 @@ typedef struct XtensaConfig {
xtensa_tlb itlb;
xtensa_tlb dtlb;
-} XtensaConfig;
+};
typedef struct XtensaConfigList {
const XtensaConfig *config;
@@ -379,7 +380,41 @@ typedef struct CPUXtensaState {
CPU_COMMON
} CPUXtensaState;
-#include "cpu-qom.h"
+/**
+ * XtensaCPU:
+ * @env: #CPUXtensaState
+ *
+ * An Xtensa CPU.
+ */
+struct XtensaCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUXtensaState env;
+};
+
+static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
+{
+ return container_of(env, XtensaCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(XtensaCPU, env)
+
+void xtensa_cpu_do_interrupt(CPUState *cpu);
+bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
+void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
+ bool is_write, bool is_exec, int opaque,
+ unsigned size);
+void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+ int is_write, int is_user, uintptr_t retaddr);
#define cpu_exec cpu_xtensa_exec
#define cpu_signal_handler cpu_xtensa_signal_handler
@@ -549,6 +584,5 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
}
#include "exec/cpu-all.h"
-#include "exec/exec-all.h"
#endif
diff --git a/target-xtensa/gdbstub.c b/target-xtensa/gdbstub.c
index 51d4db0836..fa5469a4ef 100644
--- a/target-xtensa/gdbstub.c
+++ b/target-xtensa/gdbstub.c
@@ -19,7 +19,9 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
+#include "qemu/log.h"
int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 62fa33d8d4..bc3667f0ab 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -29,6 +29,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/address-spaces.h"
#include "qemu/timer.h"
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 9eac56e2a5..67efb32ef3 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -36,6 +36,7 @@
#include "tcg-op.h"
#include "qemu/log.h"
#include "sysemu/sysemu.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/semihost.h"
diff --git a/tcg/optimize.c b/tcg/optimize.c
index f01160815c..c0d975b3d9 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -24,9 +24,8 @@
*/
#include "qemu/osdep.h"
-
-
#include "qemu-common.h"
+#include "exec/cpu-common.h"
#include "tcg-op.h"
#define CASE_OP_32_64(x) \
diff --git a/tcg/tcg-common.c b/tcg/tcg-common.c
index 97305a3efc..2f139de802 100644
--- a/tcg/tcg-common.c
+++ b/tcg/tcg-common.c
@@ -23,6 +23,8 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "exec/cpu-common.h"
#include "tcg/tcg.h"
#if defined(CONFIG_TCG_INTERPRETER)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index f554b86d40..54c02777c5 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -23,6 +23,9 @@
*/
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#include "tcg-op.h"
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 796addd1fc..254427b1b7 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -41,6 +41,11 @@
#define NO_CPU_IO_DEFS
#include "cpu.h"
+#include "qemu/host-utils.h"
+#include "qemu/timer.h"
+#include "exec/cpu-common.h"
+#include "exec/exec-all.h"
+
#include "tcg-op.h"
#if UINTPTR_MAX == UINT32_MAX
diff --git a/tcg/tcg.h b/tcg/tcg.h
index a013d77a33..909db3fc02 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -26,9 +26,32 @@
#define TCG_H
#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/tb-context.h"
#include "qemu/bitops.h"
#include "tcg-target.h"
+/* XXX: make safe guess about sizes */
+#define MAX_OP_PER_INSTR 266
+
+#if HOST_LONG_BITS == 32
+#define MAX_OPC_PARAM_PER_ARG 2
+#else
+#define MAX_OPC_PARAM_PER_ARG 1
+#endif
+#define MAX_OPC_PARAM_IARGS 5
+#define MAX_OPC_PARAM_OARGS 1
+#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
+
+/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
+ * and up to 4 + N parameters on 64-bit archs
+ * (N = number of input arguments + output arguments). */
+#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
+#define OPC_BUF_SIZE 640
+#define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
+
+#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)
+
#define CPU_TEMP_BUF_NLONGS 128
/* Default target word size to pointer size. */
diff --git a/tests/ide-test.c b/tests/ide-test.c
index 0d9ab4df95..67e5c1f5cc 100644
--- a/tests/ide-test.c
+++ b/tests/ide-test.c
@@ -32,6 +32,7 @@
#include "libqos/malloc-pc.h"
#include "qemu-common.h"
+#include "qemu/bswap.h"
#include "hw/pci/pci_ids.h"
#include "hw/pci/pci_regs.h"
diff --git a/tests/libqos/malloc.c b/tests/libqos/malloc.c
index c0df52f338..793fe69c2f 100644
--- a/tests/libqos/malloc.c
+++ b/tests/libqos/malloc.c
@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "libqos/malloc.h"
#include "qemu-common.h"
+#include "qemu/host-utils.h"
#include <glib.h>
typedef QTAILQ_HEAD(MemList, MemBlock) MemList;
diff --git a/translate-all.c b/translate-all.c
index b54f472531..1c1c85530a 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -29,6 +29,7 @@
#include "cpu.h"
#include "trace.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#if defined(CONFIG_USER_ONLY)
#include "qemu.h"
diff --git a/translate-common.c b/translate-common.c
index ffbfe856c5..5e989cdf70 100644
--- a/translate-common.c
+++ b/translate-common.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "qom/cpu.h"
+#include "sysemu/cpus.h"
uintptr_t qemu_real_host_page_size;
intptr_t qemu_real_host_page_mask;
diff --git a/ui/vnc-ws.c b/ui/vnc-ws.c
index 7c79a4c372..3bac46e774 100644
--- a/ui/vnc-ws.c
+++ b/ui/vnc-ws.c
@@ -22,6 +22,7 @@
#include "qapi/error.h"
#include "vnc.h"
#include "io/channel-websock.h"
+#include "qemu/bswap.h"
static void vncws_tls_handshake_done(Object *source,
Error *err,
diff --git a/user-exec.c b/user-exec.c
index d8d597bafe..c809daaa87 100644
--- a/user-exec.c
+++ b/user-exec.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg.h"
#include "qemu/bitops.h"
#include "exec/cpu_ldst.h"
diff --git a/util/buffer.c b/util/buffer.c
index 33e94d172f..d8bb874534 100644
--- a/util/buffer.c
+++ b/util/buffer.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/host-utils.h"
#include "qemu/buffer.h"
#include "trace.h"
diff --git a/util/log.c b/util/log.c
index 1857730dcb..5ad72c197f 100644
--- a/util/log.c
+++ b/util/log.c
@@ -42,8 +42,10 @@ void qemu_log(const char *fmt, ...)
va_end(ap);
}
+static bool log_uses_own_buffers;
+
/* enable or disable low levels log */
-void do_qemu_set_log(int log_flags, bool use_own_buffers)
+void qemu_set_log(int log_flags)
{
qemu_loglevel = log_flags;
#ifdef CONFIG_TRACE_LOG
@@ -70,7 +72,7 @@ void do_qemu_set_log(int log_flags, bool use_own_buffers)
qemu_logfile = stderr;
}
/* must avoid mmap() usage of glibc by setting a buffer "by hand" */
- if (use_own_buffers) {
+ if (log_uses_own_buffers) {
static char logfile_buf[4096];
setvbuf(qemu_logfile, logfile_buf, _IOLBF, sizeof(logfile_buf));
@@ -89,6 +91,12 @@ void do_qemu_set_log(int log_flags, bool use_own_buffers)
qemu_log_close();
}
}
+
+void qemu_log_needs_buffers(void)
+{
+ log_uses_own_buffers = true;
+}
+
/*
* Allow the user to include %d in their logfile which will be
* substituted with the current PID. This is useful for debugging many
diff --git a/vl.c b/vl.c
index e789ce7b43..a43a3bad18 100644
--- a/vl.c
+++ b/vl.c
@@ -80,6 +80,7 @@ int main(int argc, char **argv)
#include "qemu/timer.h"
#include "sysemu/char.h"
#include "qemu/bitmap.h"
+#include "qemu/log.h"
#include "sysemu/blockdev.h"
#include "hw/block/block.h"
#include "migration/block.h"
@@ -87,6 +88,7 @@ int main(int argc, char **argv)
#include "sysemu/dma.h"
#include "audio/audio.h"
#include "migration/migration.h"
+#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
#include "qapi/qmp/qjson.h"
#include "qemu/option.h"
diff --git a/xen-hvm.c b/xen-hvm.c
index 039680a6d9..c14e778a8e 100644
--- a/xen-hvm.c
+++ b/xen-hvm.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include <sys/mman.h>
+#include "cpu.h"
#include "hw/pci/pci.h"
#include "hw/i386/pc.h"
#include "hw/i386/apic-msidef.h"
@@ -725,7 +726,7 @@ static ioreq_t *cpu_get_ioreq(XenIOState *state)
return NULL;
}
-static uint32_t do_inp(pio_addr_t addr, unsigned long size)
+static uint32_t do_inp(uint32_t addr, unsigned long size)
{
switch (size) {
case 1:
@@ -735,11 +736,11 @@ static uint32_t do_inp(pio_addr_t addr, unsigned long size)
case 4:
return cpu_inl(addr);
default:
- hw_error("inp: bad size: %04"FMT_pioaddr" %lx", addr, size);
+ hw_error("inp: bad size: %04x %lx", addr, size);
}
}
-static void do_outp(pio_addr_t addr,
+static void do_outp(uint32_t addr,
unsigned long size, uint32_t val)
{
switch (size) {
@@ -750,7 +751,7 @@ static void do_outp(pio_addr_t addr,
case 4:
return cpu_outl(addr, val);
default:
- hw_error("outp: bad size: %04"FMT_pioaddr" %lx", addr, size);
+ hw_error("outp: bad size: %04x %lx", addr, size);
}
}