mirror of https://gitee.com/openkylin/qemu.git
Fix sp804 dual-timer
Properly implement dual-timer read/write for the sp804 dual timer module. Based on ARM specs at http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/index.html Signed-off-by: Hans Jang <hsjang@ok-labs.com> Signed-off-by: David Mirabito <david.mirabito@nicta.com.au> Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -170,9 +170,9 @@ static arm_timer_state *arm_timer_init(uint32_t freq)
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}
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/* ARM PrimeCell SP804 dual timer module.
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Docs for this device don't seem to be publicly available. This
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implementation is based on guesswork, the linux kernel sources and the
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Integrator/CP timer modules. */
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* Docs at
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/index.html
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*/
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typedef struct {
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SysBusDevice busdev;
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@ -182,6 +182,13 @@ typedef struct {
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qemu_irq irq;
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} sp804_state;
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static const uint8_t sp804_ids[] = {
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/* Timer ID */
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0x04, 0x18, 0x14, 0,
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/* PrimeCell ID */
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0xd, 0xf0, 0x05, 0xb1
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};
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/* Merge the IRQs from the two component devices. */
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static void sp804_set_irq(void *opaque, int irq, int level)
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{
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@ -196,12 +203,27 @@ static uint64_t sp804_read(void *opaque, target_phys_addr_t offset,
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{
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sp804_state *s = (sp804_state *)opaque;
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/* ??? Don't know the PrimeCell ID for this device. */
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if (offset < 0x20) {
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return arm_timer_read(s->timer[0], offset);
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} else {
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}
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if (offset < 0x40) {
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return arm_timer_read(s->timer[1], offset - 0x20);
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}
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/* TimerPeriphID */
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if (offset >= 0xfe0 && offset <= 0xffc) {
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return sp804_ids[(offset - 0xfe0) >> 2];
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}
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switch (offset) {
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/* Integration Test control registers, which we won't support */
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case 0xf00: /* TimerITCR */
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case 0xf04: /* TimerITOP (strictly write only but..) */
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return 0;
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}
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hw_error("%s: Bad offset %x\n", __func__, (int)offset);
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return 0;
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}
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static void sp804_write(void *opaque, target_phys_addr_t offset,
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@ -211,9 +233,16 @@ static void sp804_write(void *opaque, target_phys_addr_t offset,
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if (offset < 0x20) {
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arm_timer_write(s->timer[0], offset, value);
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} else {
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arm_timer_write(s->timer[1], offset - 0x20, value);
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return;
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}
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if (offset < 0x40) {
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arm_timer_write(s->timer[1], offset - 0x20, value);
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return;
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}
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/* Technically we could be writing to the Test Registers, but not likely */
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hw_error("%s: Bad offset %x\n", __func__, (int)offset);
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}
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static const MemoryRegionOps sp804_ops = {
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