mirror of https://gitee.com/openkylin/qemu.git
tcg/arm: Make direct jump patching thread-safe
Ensure direct jump patching in ARM is atomic by using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Message-Id: <1461341333-19646-8-git-send-email-sergey.fedorov@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -328,29 +328,8 @@ static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
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void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
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#define tb_set_jmp_target1 aarch64_tb_set_jmp_target
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#define tb_set_jmp_target1 aarch64_tb_set_jmp_target
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#elif defined(__arm__)
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#elif defined(__arm__)
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static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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void arm_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
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{
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#define tb_set_jmp_target1 arm_tb_set_jmp_target
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#if !QEMU_GNUC_PREREQ(4, 1)
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register unsigned long _beg __asm ("a1");
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register unsigned long _end __asm ("a2");
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register unsigned long _flg __asm ("a3");
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#endif
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/* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
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*(uint32_t *)jmp_addr =
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(*(uint32_t *)jmp_addr & ~0xffffff)
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#if QEMU_GNUC_PREREQ(4, 1)
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__builtin___clear_cache((char *) jmp_addr, (char *) jmp_addr + 4);
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#else
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/* flush icache */
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_beg = jmp_addr;
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_end = jmp_addr + 4;
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_flg = 0;
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__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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#endif
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}
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#elif defined(__sparc__) || defined(__mips__)
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#elif defined(__sparc__) || defined(__mips__)
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr);
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr);
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#else
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#else
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@ -121,6 +121,14 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
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*code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
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*code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
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}
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}
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static inline void reloc_pc24_atomic(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
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{
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ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
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tcg_insn_unit insn = atomic_read(code_ptr);
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tcg_debug_assert(offset == sextract32(offset, 0, 24));
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atomic_set(code_ptr, deposit32(insn, 0, 24, offset));
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}
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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intptr_t value, intptr_t addend)
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intptr_t value, intptr_t addend)
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{
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{
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@ -1038,6 +1046,16 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *addr)
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}
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}
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}
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}
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void arm_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr)
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{
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tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr;
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tcg_insn_unit *target = (tcg_insn_unit *)addr;
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/* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
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reloc_pc24_atomic(code_ptr, target);
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flush_icache_range(jmp_addr, jmp_addr + 4);
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}
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static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l)
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static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l)
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{
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{
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if (l->has_value) {
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if (l->has_value) {
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