mirror of https://gitee.com/openkylin/qemu.git
pl190: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
ca45842ab6
commit
7f8293bf63
28
hw/pl190.c
28
hw/pl190.c
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@ -17,6 +17,7 @@
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typedef struct {
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typedef struct {
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SysBusDevice busdev;
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SysBusDevice busdev;
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MemoryRegion iomem;
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uint32_t level;
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uint32_t level;
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uint32_t soft_level;
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uint32_t soft_level;
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uint32_t irq_enable;
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uint32_t irq_enable;
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@ -84,7 +85,8 @@ static void pl190_update_vectors(pl190_state *s)
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pl190_update(s);
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pl190_update(s);
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}
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}
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static uint32_t pl190_read(void *opaque, target_phys_addr_t offset)
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static uint64_t pl190_read(void *opaque, target_phys_addr_t offset,
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unsigned size)
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{
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{
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pl190_state *s = (pl190_state *)opaque;
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pl190_state *s = (pl190_state *)opaque;
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int i;
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int i;
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@ -140,7 +142,8 @@ static uint32_t pl190_read(void *opaque, target_phys_addr_t offset)
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}
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}
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}
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}
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static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
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static void pl190_write(void *opaque, target_phys_addr_t offset,
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uint64_t val, unsigned size)
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{
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{
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pl190_state *s = (pl190_state *)opaque;
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pl190_state *s = (pl190_state *)opaque;
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@ -199,16 +202,10 @@ static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
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pl190_update(s);
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pl190_update(s);
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}
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}
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static CPUReadMemoryFunc * const pl190_readfn[] = {
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static const MemoryRegionOps pl190_ops = {
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pl190_read,
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.read = pl190_read,
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pl190_read,
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.write = pl190_write,
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pl190_read
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static CPUWriteMemoryFunc * const pl190_writefn[] = {
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pl190_write,
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pl190_write,
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pl190_write
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};
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};
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static void pl190_reset(DeviceState *d)
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static void pl190_reset(DeviceState *d)
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@ -230,12 +227,9 @@ static void pl190_reset(DeviceState *d)
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static int pl190_init(SysBusDevice *dev)
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static int pl190_init(SysBusDevice *dev)
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{
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{
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pl190_state *s = FROM_SYSBUS(pl190_state, dev);
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pl190_state *s = FROM_SYSBUS(pl190_state, dev);
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int iomemtype;
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iomemtype = cpu_register_io_memory(pl190_readfn,
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memory_region_init_io(&s->iomem, &pl190_ops, s, "pl190", 0x1000);
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pl190_writefn, s,
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sysbus_init_mmio_region(dev, &s->iomem);
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
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qdev_init_gpio_in(&dev->qdev, pl190_set_irq, 32);
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(dev, &s->fiq);
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sysbus_init_irq(dev, &s->fiq);
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