mirror of https://gitee.com/openkylin/qemu.git
Sparc32: convert SBI to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
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871e6c3507
commit
7fc067350c
60
hw/sbi.c
60
hw/sbi.c
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@ -21,9 +21,11 @@
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "sun4m.h"
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#include "console.h"
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#include "sysbus.h"
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//#define DEBUG_IRQ
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@ -39,9 +41,10 @@
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#define SBI_NREGS 16
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typedef struct SBIState {
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SysBusDevice busdev;
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uint32_t regs[SBI_NREGS];
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uint32_t intreg_pending[MAX_CPUS];
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qemu_irq *cpu_irqs[MAX_CPUS];
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qemu_irq cpu_irqs[MAX_CPUS];
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uint32_t pil_out[MAX_CPUS];
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} SBIState;
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@ -51,10 +54,6 @@ static void sbi_set_irq(void *opaque, int irq, int level)
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{
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}
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static void sbi_set_timer_irq_cpu(void *opaque, int cpu, int level)
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{
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}
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static uint32_t sbi_mem_readl(void *opaque, target_phys_addr_t addr)
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{
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SBIState *s = opaque;
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@ -132,27 +131,54 @@ static void sbi_reset(void *opaque)
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}
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}
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void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
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qemu_irq **parent_irq)
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DeviceState *sbi_init(target_phys_addr_t addr, qemu_irq **parent_irq)
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{
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DeviceState *dev;
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SysBusDevice *s;
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unsigned int i;
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int sbi_io_memory;
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SBIState *s;
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s = qemu_mallocz(sizeof(SBIState));
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dev = qdev_create(NULL, "sbi");
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qdev_init(dev);
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s = sysbus_from_qdev(dev);
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for (i = 0; i < MAX_CPUS; i++) {
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s->cpu_irqs[i] = parent_irq[i];
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sysbus_connect_irq(s, i, *parent_irq[i]);
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}
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sysbus_mmio_map(s, 0, addr);
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return dev;
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}
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static void sbi_init1(SysBusDevice *dev)
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{
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SBIState *s = FROM_SYSBUS(SBIState, dev);
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int sbi_io_memory;
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unsigned int i;
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qdev_init_gpio_in(&dev->qdev, sbi_set_irq, 32 + MAX_CPUS);
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for (i = 0; i < MAX_CPUS; i++) {
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sysbus_init_irq(dev, &s->cpu_irqs[i]);
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}
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sbi_io_memory = cpu_register_io_memory(sbi_mem_read, sbi_mem_write, s);
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cpu_register_physical_memory(addr, SBI_SIZE, sbi_io_memory);
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sysbus_init_mmio(dev, SBI_SIZE, sbi_io_memory);
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register_savevm("sbi", addr, 1, sbi_save, sbi_load, s);
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register_savevm("sbi", -1, 1, sbi_save, sbi_load, s);
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qemu_register_reset(sbi_reset, s);
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*irq = qemu_allocate_irqs(sbi_set_irq, s, 32);
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*cpu_irq = qemu_allocate_irqs(sbi_set_timer_irq_cpu, s, MAX_CPUS);
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sbi_reset(s);
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return s;
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}
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static SysBusDeviceInfo sbi_info = {
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.init = sbi_init1,
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.qdev.name = "sbi",
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.qdev.size = sizeof(SBIState),
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};
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static void sbi_register_devices(void)
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{
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sysbus_register_withprop(&sbi_info);
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}
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device_init(sbi_register_devices)
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14
hw/sun4m.c
14
hw/sun4m.c
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@ -1322,12 +1322,13 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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{
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CPUState *envs[MAX_CPUS];
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unsigned int i;
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void *iounits[MAX_IOUNITS], *espdma, *ledma, *nvram, *sbi;
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qemu_irq *cpu_irqs[MAX_CPUS], *sbi_irq, *sbi_cpu_irq,
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void *iounits[MAX_IOUNITS], *espdma, *ledma, *nvram;
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qemu_irq *cpu_irqs[MAX_CPUS], sbi_irq[32], sbi_cpu_irq[MAX_CPUS],
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espdma_irq, ledma_irq;
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qemu_irq *esp_reset, *le_reset;
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unsigned long kernel_size;
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void *fw_cfg;
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DeviceState *dev;
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/* init CPUs */
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if (!cpu_model)
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@ -1345,7 +1346,14 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
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prom_init(hwdef->slavio_base, bios_name);
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sbi = sbi_init(hwdef->sbi_base, &sbi_irq, &sbi_cpu_irq, cpu_irqs);
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dev = sbi_init(hwdef->sbi_base, cpu_irqs);
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for (i = 0; i < 32; i++) {
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sbi_irq[i] = qdev_get_gpio_in(dev, i);
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}
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for (i = 0; i < MAX_CPUS; i++) {
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sbi_cpu_irq[i] = qdev_get_gpio_in(dev, 32 + i);
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}
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for (i = 0; i < MAX_IOUNITS; i++)
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if (hwdef->iounit_bases[i] != (target_phys_addr_t)-1)
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@ -36,8 +36,7 @@ void slavio_pic_info(Monitor *mon, void *opaque);
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void slavio_irq_info(Monitor *mon, void *opaque);
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/* sbi.c */
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void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
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qemu_irq **parent_irq);
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DeviceState *sbi_init(target_phys_addr_t addr, qemu_irq **parent_irq);
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/* sun4c_intctl.c */
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void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,
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