mirror of https://gitee.com/openkylin/qemu.git
KVM: target-ppc: Enable TM state migration
This adds migration support for registers saved before Transactional Memory (TM) transaction started. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -1099,6 +1099,20 @@ struct CPUPPCState {
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*/
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uint8_t fit_period[4];
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uint8_t wdt_period[4];
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/* Transactional memory state */
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target_ulong tm_gpr[32];
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ppc_avr_t tm_vsr[64];
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uint64_t tm_cr;
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uint64_t tm_lr;
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uint64_t tm_ctr;
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uint64_t tm_fpscr;
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uint64_t tm_amr;
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uint64_t tm_ppr;
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uint64_t tm_vrsave;
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uint32_t tm_vscr;
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uint64_t tm_dscr;
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uint64_t tm_tar;
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};
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#define SET_FIT_PERIOD(a_, b_, c_, d_) \
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@ -865,6 +865,25 @@ int kvm_arch_put_registers(CPUState *cs, int level)
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}
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#ifdef TARGET_PPC64
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if (msr_ts) {
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for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]);
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}
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for (i = 0; i < ARRAY_SIZE(env->tm_vsr); i++) {
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_VSR(i), &env->tm_vsr[i]);
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}
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_CR, &env->tm_cr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_LR, &env->tm_lr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_CTR, &env->tm_ctr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_FPSCR, &env->tm_fpscr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_AMR, &env->tm_amr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_PPR, &env->tm_ppr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_VRSAVE, &env->tm_vrsave);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_VSCR, &env->tm_vscr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_DSCR, &env->tm_dscr);
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kvm_set_one_reg(cs, KVM_REG_PPC_TM_TAR, &env->tm_tar);
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}
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if (cap_papr) {
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if (kvm_put_vpa(cs) < 0) {
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DPRINTF("Warning: Unable to set VPA information to KVM\n");
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@ -1091,6 +1110,25 @@ int kvm_arch_get_registers(CPUState *cs)
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}
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#ifdef TARGET_PPC64
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if (msr_ts) {
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for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]);
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}
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for (i = 0; i < ARRAY_SIZE(env->tm_vsr); i++) {
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_VSR(i), &env->tm_vsr[i]);
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}
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_CR, &env->tm_cr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_LR, &env->tm_lr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_CTR, &env->tm_ctr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_FPSCR, &env->tm_fpscr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_AMR, &env->tm_amr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_PPR, &env->tm_ppr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_VRSAVE, &env->tm_vrsave);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_VSCR, &env->tm_vscr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_DSCR, &env->tm_dscr);
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kvm_get_one_reg(cs, KVM_REG_PPC_TM_TAR, &env->tm_tar);
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}
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if (cap_papr) {
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if (kvm_get_vpa(cs) < 0) {
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DPRINTF("Warning: Unable to get VPA information from KVM\n");
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@ -249,6 +249,38 @@ static const VMStateDescription vmstate_vsx = {
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},
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};
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#ifdef TARGET_PPC64
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/* Transactional memory state */
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static bool tm_needed(void *opaque)
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{
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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return msr_ts;
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}
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static const VMStateDescription vmstate_tm = {
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.name = "cpu/tm",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINTTL_ARRAY(env.tm_gpr, PowerPCCPU, 32),
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VMSTATE_AVR_ARRAY(env.tm_vsr, PowerPCCPU, 64),
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VMSTATE_UINT64(env.tm_cr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_lr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_ctr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_fpscr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_amr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_ppr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_vrsave, PowerPCCPU),
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VMSTATE_UINT32(env.tm_vscr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_dscr, PowerPCCPU),
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VMSTATE_UINT64(env.tm_tar, PowerPCCPU),
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VMSTATE_END_OF_LIST()
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},
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};
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#endif
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static bool sr_needed(void *opaque)
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{
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#ifdef TARGET_PPC64
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@ -510,6 +542,9 @@ const VMStateDescription vmstate_ppc_cpu = {
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.needed = sr_needed,
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} , {
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#ifdef TARGET_PPC64
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.vmsd = &vmstate_tm,
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.needed = tm_needed,
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} , {
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.vmsd = &vmstate_slb,
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.needed = slb_needed,
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} , {
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