mirror of https://gitee.com/openkylin/qemu.git
The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
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/*
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* CRIS virtual CPU header
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*
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* Copyright (c) 2007 AXIS Communications AB
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* Written by Edgar E. Iglesias
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU Lesser General Public
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||||
* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef CPU_CRIS_H
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#define CPU_CRIS_H
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#define TARGET_LONG_BITS 32
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#include "cpu-defs.h"
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#include "softfloat.h"
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#define TARGET_HAS_ICE 1
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#define ELF_MACHINE EM_CRIS
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#define EXCP_MMU_EXEC 0
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#define EXCP_MMU_READ 1
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#define EXCP_MMU_WRITE 2
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#define EXCP_MMU_FLUSH 3
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#define EXCP_MMU_MISS 4
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#define EXCP_BREAK 16 /* trap. */
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/* CPU flags. */
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#define S_FLAG 0x200
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#define R_FLAG 0x100
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#define P_FLAG 0x80
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#define U_FLAG 0x40
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#define P_FLAG 0x80
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#define U_FLAG 0x40
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#define I_FLAG 0x20
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#define X_FLAG 0x10
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#define N_FLAG 0x08
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#define Z_FLAG 0x04
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#define V_FLAG 0x02
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#define C_FLAG 0x01
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#define ALU_FLAGS 0x1F
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/* Condition codes. */
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#define CC_CC 0
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#define CC_CS 1
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#define CC_NE 2
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#define CC_EQ 3
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#define CC_VC 4
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#define CC_VS 5
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#define CC_PL 6
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#define CC_MI 7
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#define CC_LS 8
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#define CC_HI 9
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#define CC_GE 10
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#define CC_LT 11
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#define CC_GT 12
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#define CC_LE 13
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#define CC_A 14
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#define CC_P 15
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/* Internal flags for the implementation. */
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#define F_DELAYSLOT 1
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typedef struct CPUCRISState {
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uint32_t debug1;
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uint32_t debug2;
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uint32_t debug3;
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/*
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* We just store the stores to the tlbset here for later evaluation
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* when the hw needs access to them.
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*
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* One for I and another for D.
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*/
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struct
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{
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uint32_t hi;
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uint32_t lo;
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} tlbsets[2][4][16];
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uint32_t sregs[256][16]; /* grrr why so many?? */
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uint32_t regs[16];
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uint32_t pregs[16];
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uint32_t pc;
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uint32_t sr;
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uint32_t flag_mask; /* Per insn mask of affected flags. */
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/* SSP and USP. */
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int current_sp;
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uint32_t sp[2];
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/* These are setup up by the guest code just before transfering the
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control back to the host. */
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int jmp;
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uint32_t btarget;
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int btaken;
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/* for traps. */
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int trapnr;
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/* Condition flag tracking. */
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uint32_t cc_op;
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uint32_t cc_mask;
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uint32_t cc_dest;
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uint32_t cc_src;
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uint32_t cc_result;
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/* size of the operation, 1 = byte, 2 = word, 4 = dword. */
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int cc_size;
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/* extended arithmetics. */
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int cc_x_live;
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int cc_x;
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int features;
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uint64_t pending_interrupts;
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int interrupt_request;
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int exception_index;
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int user_mode_only;
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int halted;
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struct
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{
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int exec_insns;
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int exec_loads;
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int exec_stores;
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} stats;
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jmp_buf jmp_env;
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CPU_COMMON
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} CPUCRISState;
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CPUCRISState *cpu_cris_init(void);
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int cpu_cris_exec(CPUCRISState *s);
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void cpu_cris_close(CPUCRISState *s);
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void do_interrupt(CPUCRISState *env);
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/* you can call this signal handler from your SIGBUS and SIGSEGV
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signal handlers to inform the virtual CPU of exceptions. non zero
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is returned if the signal was handled by the virtual CPU. */
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int cpu_cris_signal_handler(int host_signum, void *pinfo,
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void *puc);
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void cpu_cris_flush_flags(CPUCRISState *, int);
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
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int is_asi);
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enum {
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CC_OP_DYNAMIC, /* Use env->cc_op */
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CC_OP_FLAGS,
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CC_OP_LOGIC,
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CC_OP_CMP,
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CC_OP_MOVE,
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CC_OP_MOVE_PD,
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CC_OP_MOVE_SD,
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CC_OP_ADD,
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CC_OP_ADDC,
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CC_OP_MCP,
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CC_OP_ADDU,
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CC_OP_SUB,
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CC_OP_SUBU,
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CC_OP_NEG,
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CC_OP_BTST,
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CC_OP_MULS,
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CC_OP_MULU,
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CC_OP_DSTEP,
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CC_OP_BOUND,
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CC_OP_OR,
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CC_OP_AND,
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CC_OP_XOR,
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CC_OP_LSL,
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CC_OP_LSR,
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CC_OP_ASR,
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CC_OP_LZ
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};
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#define CCF_C 0x01
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#define CCF_V 0x02
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#define CCF_Z 0x04
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#define CCF_N 0x08
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#define CCF_X 0x10
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#define CRIS_SSP 0
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#define CRIS_USP 1
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typedef struct cris_def_t cris_def_t;
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int cpu_cris_set_model(CPUCRISState *env, const char * name);
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void cris_set_irq_level(CPUCRISState *env, int level, uint8_t vector);
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void cris_set_macsr(CPUCRISState *env, uint32_t val);
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void cris_switch_sp(CPUCRISState *env);
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void do_cris_semihosting(CPUCRISState *env, int nr);
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enum cris_features {
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CRIS_FEATURE_CF_ISA_MUL,
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};
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static inline int cris_feature(CPUCRISState *env, int feature)
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{
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return (env->features & (1u << feature)) != 0;
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}
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void register_cris_insns (CPUCRISState *env);
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/* CRIS uses 8k pages. */
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#define TARGET_PAGE_BITS 13
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#define CPUState CPUCRISState
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#define cpu_init cpu_cris_init
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#define cpu_exec cpu_cris_exec
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#define cpu_gen_code cpu_cris_gen_code
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#define cpu_signal_handler cpu_cris_signal_handler
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#include "cpu-all.h"
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/* Register aliases. */
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#define REG_SP 14
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#define REG_ACR 15
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#define REG_MOF 7
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/* Support regs. */
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#define SR_PID 2
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#define SR_SRS 3
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#define SR_EBP 9
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#define SR_ERP 10
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#define SR_CCS 13
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/* Support func regs. */
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#define SFR_RW_GC_CFG 0][0
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#define SFR_RW_MM_CFG 1][0
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#define SFR_RW_MM_KBASE_LO 1][1
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#define SFR_RW_MM_KBASE_HI 1][2
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#define SFR_R_MM_CAUSE 1][3
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#define SFR_RW_MM_TLB_SEL 1][4
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#define SFR_RW_MM_TLB_LO 1][5
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#define SFR_RW_MM_TLB_HI 1][6
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#endif
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@ -0,0 +1,68 @@
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/*
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* CRIS execution defines
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*
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* Copyright (c) 2007 AXIS Communications AB
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* Written by Edgar E. Iglesias
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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||||
* General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU Lesser General Public
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||||
* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "dyngen-exec.h"
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#if 1
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register struct CPUCRISState *env asm(AREG0);
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/* This is only used for tb lookup. */
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register uint32_t T0 asm(AREG1);
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register uint32_t T1 asm(AREG2);
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#else
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struct CPUCRISState *env;
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/* This is only used for tb lookup. */
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uint32_t T0;
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uint32_t T1;
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#endif
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#include "cpu.h"
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#include "exec-all.h"
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#define RETURN() __asm__ __volatile__("" : : : "memory");
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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int is_user, int is_softmmu);
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void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr);
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif
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void cpu_cris_flush_flags(CPUCRISState *env, int cc_op);
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void helper_movec(CPUCRISState *env, int reg, uint32_t val);
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void cpu_loop_exit(void);
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static inline int cpu_halted(CPUState *env) {
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if (!env->halted)
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return 0;
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if (env->interrupt_request & CPU_INTERRUPT_HARD) {
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env->halted = 0;
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return 0;
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}
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return EXCP_HALTED;
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}
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@ -0,0 +1,173 @@
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/*
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* CRIS helper routines.
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*
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* Copyright (c) 2007 AXIS Communications AB
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* Written by Edgar E. Iglesias.
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*
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* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
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||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <stdio.h>
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#include <string.h>
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#include "config.h"
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#include "cpu.h"
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#include "mmu.h"
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#include "exec-all.h"
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#if defined(CONFIG_USER_ONLY)
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void do_interrupt (CPUState *env)
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{
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env->exception_index = -1;
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}
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int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
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int is_user, int is_softmmu)
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{
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env->exception_index = 0xaa;
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env->debug1 = address;
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cpu_dump_state(env, stderr, fprintf, 0);
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printf("%s addr=%x env->pc=%x\n", __func__, address, env->pc);
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return 1;
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}
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target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
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{
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return addr;
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}
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#else /* !CONFIG_USER_ONLY */
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int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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int is_user, int is_softmmu)
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{
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struct cris_mmu_result_t res;
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int prot, miss;
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target_ulong phy;
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address &= TARGET_PAGE_MASK;
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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// printf ("%s pc=%x %x w=%d smmu=%d\n", __func__, env->pc, address, rw, is_softmmu);
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miss = cris_mmu_translate(&res, env, address, rw, is_user);
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if (miss)
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{
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/* handle the miss. */
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phy = 0;
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env->exception_index = EXCP_MMU_MISS;
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}
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else
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{
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phy = res.phy;
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}
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// printf ("a=%x phy=%x\n", address, phy);
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return tlb_set_page(env, address, phy, prot, is_user, is_softmmu);
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}
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|
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||||
static void cris_shift_ccs(CPUState *env)
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{
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uint32_t ccs;
|
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/* Apply the ccs shift. */
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ccs = env->pregs[SR_CCS];
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ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
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// printf ("ccs=%x %x\n", env->pregs[SR_CCS], ccs);
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env->pregs[SR_CCS] = ccs;
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||||
}
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||||
|
||||
void do_interrupt(CPUState *env)
|
||||
{
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||||
uint32_t ebp, isr;
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int irqnum;
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||||
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||||
fflush(NULL);
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||||
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||||
#if 0
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printf ("exception index=%d interrupt_req=%d\n",
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env->exception_index,
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env->interrupt_request);
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||||
#endif
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||||
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||||
switch (env->exception_index)
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||||
{
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||||
case EXCP_BREAK:
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// printf ("BREAK! %d\n", env->trapnr);
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irqnum = env->trapnr;
|
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ebp = env->pregs[SR_EBP];
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isr = ldl_code(ebp + irqnum * 4);
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env->pregs[SR_ERP] = env->pc + 2;
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env->pc = isr;
|
||||
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||||
cris_shift_ccs(env);
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||||
|
||||
break;
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||||
case EXCP_MMU_MISS:
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// printf ("MMU miss\n");
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||||
irqnum = 4;
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||||
ebp = env->pregs[SR_EBP];
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isr = ldl_code(ebp + irqnum * 4);
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env->pregs[SR_ERP] = env->pc;
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||||
env->pc = isr;
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||||
cris_shift_ccs(env);
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||||
break;
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||||
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||||
default:
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||||
{
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||||
/* Maybe the irq was acked by sw before we got a
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||||
change to take it. */
|
||||
if (env->interrupt_request & CPU_INTERRUPT_HARD) {
|
||||
if (!env->pending_interrupts)
|
||||
return;
|
||||
if (!(env->pregs[SR_CCS] & I_FLAG)) {
|
||||
return;
|
||||
}
|
||||
|
||||
irqnum = 31 -
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||||
__builtin_clz(env->pending_interrupts);
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||||
irqnum += 0x30;
|
||||
ebp = env->pregs[SR_EBP];
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||||
isr = ldl_code(ebp + irqnum * 4);
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||||
env->pregs[SR_ERP] = env->pc;
|
||||
env->pc = isr;
|
||||
|
||||
cris_shift_ccs(env);
|
||||
#if 0
|
||||
printf ("%s ebp=%x %x isr=%x %d"
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||||
" ir=%x pending=%x\n",
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||||
__func__,
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ebp, ebp + irqnum * 4,
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||||
isr, env->exception_index,
|
||||
env->interrupt_request,
|
||||
env->pending_interrupts);
|
||||
#endif
|
||||
}
|
||||
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
|
||||
{
|
||||
// printf ("%s\n", __func__);
|
||||
uint32_t phy = addr;
|
||||
struct cris_mmu_result_t res;
|
||||
int miss;
|
||||
miss = cris_mmu_translate(&res, env, addr, 0, 0);
|
||||
if (!miss)
|
||||
phy = res.phy;
|
||||
return phy;
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* CRIS helper routines
|
||||
*
|
||||
* Copyright (c) 2007 AXIS Communications
|
||||
* Written by Edgar E. Iglesias
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include "exec.h"
|
||||
|
||||
#define MMUSUFFIX _mmu
|
||||
#define GETPC() (__builtin_return_address(0))
|
||||
|
||||
#define SHIFT 0
|
||||
#include "softmmu_template.h"
|
||||
|
||||
#define SHIFT 1
|
||||
#include "softmmu_template.h"
|
||||
|
||||
#define SHIFT 2
|
||||
#include "softmmu_template.h"
|
||||
|
||||
#define SHIFT 3
|
||||
#include "softmmu_template.h"
|
||||
|
||||
/* Try to fill the TLB and return an exception if error. If retaddr is
|
||||
NULL, it means that the function was called in C code (i.e. not
|
||||
from generated code or from helper.c) */
|
||||
/* XXX: fix it to restore all registers */
|
||||
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
|
||||
{
|
||||
TranslationBlock *tb;
|
||||
CPUState *saved_env;
|
||||
target_phys_addr_t pc;
|
||||
int ret;
|
||||
|
||||
/* XXX: hack to restore env in all cases, even if not called from
|
||||
generated code */
|
||||
saved_env = env;
|
||||
env = cpu_single_env;
|
||||
ret = cpu_cris_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
||||
if (__builtin_expect(ret, 0)) {
|
||||
if (retaddr) {
|
||||
/* now we have a real cpu fault */
|
||||
pc = (target_phys_addr_t)retaddr;
|
||||
tb = tb_find_pc(pc);
|
||||
if (tb) {
|
||||
/* the PC is inside the translated code. It means that we have
|
||||
a virtual CPU fault */
|
||||
cpu_restore_state(tb, env, pc, NULL);
|
||||
}
|
||||
}
|
||||
cpu_loop_exit();
|
||||
}
|
||||
env = saved_env;
|
||||
}
|
||||
|
||||
void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
|
||||
int is_asi)
|
||||
{
|
||||
|
||||
}
|
|
@ -0,0 +1,59 @@
|
|||
/*
|
||||
* CRIS memory access (load and store) micro operations.
|
||||
*
|
||||
* Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
void glue(op_ldb_T0_T0, MEMSUFFIX) (void) {
|
||||
T0 = glue(ldsb, MEMSUFFIX) (T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_ldub_T0_T0, MEMSUFFIX) (void) {
|
||||
T0 = glue(ldub, MEMSUFFIX) (T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_stb_T0_T1, MEMSUFFIX) (void) {
|
||||
glue(stb, MEMSUFFIX) (T0, T1);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_ldw_T0_T0, MEMSUFFIX) (void) {
|
||||
T0 = glue(ldsw, MEMSUFFIX) (T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_lduw_T0_T0, MEMSUFFIX) (void) {
|
||||
T0 = glue(lduw, MEMSUFFIX) (T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_stw_T0_T1, MEMSUFFIX) (void) {
|
||||
glue(stw, MEMSUFFIX) (T0, T1);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_ldl_T0_T0, MEMSUFFIX) (void) {
|
||||
T0 = glue(ldl, MEMSUFFIX) (T0);
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void glue(op_stl_T0_T1, MEMSUFFIX) (void) {
|
||||
glue(stl, MEMSUFFIX) (T0, T1);
|
||||
RETURN();
|
||||
}
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* CRIS micro operations (templates for various register related
|
||||
* operations)
|
||||
*
|
||||
* Copyright (c) 2003 Fabrice Bellard
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef SET_REG
|
||||
#define SET_REG(x) REG = x
|
||||
#endif
|
||||
|
||||
void OPPROTO glue(op_movl_T0_, REGNAME)(void)
|
||||
{
|
||||
T0 = REG;
|
||||
}
|
||||
|
||||
void OPPROTO glue(op_movl_T1_, REGNAME)(void)
|
||||
{
|
||||
T1 = REG;
|
||||
}
|
||||
|
||||
void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void)
|
||||
{
|
||||
SET_REG (T0);
|
||||
}
|
||||
|
||||
void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void)
|
||||
{
|
||||
SET_REG (T1);
|
||||
}
|
||||
|
||||
#undef REG
|
||||
#undef REGNAME
|
||||
#undef SET_REG
|
Loading…
Reference in New Issue