diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 9dbadf4d32..601cb247cc 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -117,6 +117,7 @@ typedef struct CPUSH4State { CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ void *intc_handle; + int intr_at_halt; /* SR_BL ignored during sleep */ } CPUSH4State; CPUSH4State *cpu_sh4_init(const char *cpu_model); diff --git a/target-sh4/exec.h b/target-sh4/exec.h index 2d333761f8..544dc0f1b1 100644 --- a/target-sh4/exec.h +++ b/target-sh4/exec.h @@ -41,6 +41,7 @@ static inline int cpu_halted(CPUState *env) { return 0; if (env->interrupt_request & CPU_INTERRUPT_HARD) { env->halted = 0; + env->intr_at_halt = 1; return 0; } return EXCP_HALTED; diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 917f02f806..bdbf70ebab 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -87,9 +87,10 @@ void do_interrupt(CPUState * env) if (do_exp && env->exception_index != 0x1e0) { env->exception_index = 0x000; /* masked exception -> reset */ } - if (do_irq) { + if (do_irq && !env->intr_at_halt) { return; /* masked */ } + env->intr_at_halt = 0; } if (do_irq) { diff --git a/target-sh4/op.c b/target-sh4/op.c index 22d49138fb..37ac93099a 100644 --- a/target-sh4/op.c +++ b/target-sh4/op.c @@ -1091,6 +1091,13 @@ void OPPROTO op_debug(void) cpu_loop_exit(); } +void OPPROTO op_sleep(void) +{ + env->halted = 1; + env->exception_index = EXCP_HLT; + cpu_loop_exit(); +} + /* Load and store */ #define MEMSUFFIX _raw #include "op_mem.c" diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 15500a6c73..6f9fe33d3e 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -298,7 +298,12 @@ void _decode_opc(DisasContext * ctx) case 0x0009: /* nop */ return; case 0x001b: /* sleep */ - assert(0); /* XXXXX */ + if (ctx->memidx) { + gen_op_sleep(); + } else { + gen_op_raise_illegal_instruction(); + ctx->bstate = BS_EXCP; + } return; }