mirror of https://gitee.com/openkylin/qemu.git
target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3
Sort this check to the start of a trans_* function. Merge this with any existing test for fpdp_v2. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200224222232.13807-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -717,7 +717,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
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* VFPv2 allows access to FPSID from userspace; VFPv3 restricts
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* all ID registers to privileged access only.
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*/
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if (IS_USER(s) && arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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if (IS_USER(s) && dc_isar_feature(aa32_fpsp_v3, s)) {
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return false;
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}
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ignore_vfp_enabled = true;
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@ -746,7 +746,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
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case ARM_VFP_FPINST:
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case ARM_VFP_FPINST2:
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/* Not present in VFPv3 */
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if (IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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if (IS_USER(s) || dc_isar_feature(aa32_fpsp_v3, s)) {
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return false;
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}
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break;
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@ -1873,12 +1873,12 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
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vd = a->vd;
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if (!dc_isar_feature(aa32_fpshvec, s) &&
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(veclen != 0 || s->vec_stride != 0)) {
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if (!dc_isar_feature(aa32_fpsp_v3, s)) {
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return false;
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}
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if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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if (!dc_isar_feature(aa32_fpshvec, s) &&
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(veclen != 0 || s->vec_stride != 0)) {
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return false;
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}
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@ -1923,7 +1923,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
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vd = a->vd;
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if (!dc_isar_feature(aa32_fpdp_v2, s)) {
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if (!dc_isar_feature(aa32_fpdp_v3, s)) {
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return false;
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}
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@ -1937,10 +1937,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
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return false;
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}
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if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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return false;
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}
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if (!vfp_access_check(s)) {
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return true;
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}
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@ -2565,7 +2561,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a)
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TCGv_ptr fpst;
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int frac_bits;
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if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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if (!dc_isar_feature(aa32_fpsp_v3, s)) {
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return false;
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}
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@ -2625,11 +2621,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
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TCGv_ptr fpst;
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int frac_bits;
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if (!dc_isar_feature(aa32_fpdp_v2, s)) {
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return false;
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}
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if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
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if (!dc_isar_feature(aa32_fpdp_v3, s)) {
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return false;
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}
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