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RISC-V: Remove EM_RISCV ELF_MACHINE indirection 

Pointless indirection. Other ports use EM_ constants directly.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Michael Clark 2018-03-05 20:22:30 +13:00
parent 5b5583806b
commit 89854803ce
No known key found for this signature in database
GPG Key ID: 6BF1D7B357EF3E4F
5 changed files with 4 additions and 5 deletions
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2
hw/riscv/sifive_e.c
View File

@ -88,7 +88,7 @@ static uint64_t load_kernel(const char *kernel_filename)
if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
0, EM_RISCV, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);
}

2
hw/riscv/sifive_u.c
View File

@ -74,7 +74,7 @@ static uint64_t load_kernel(const char *kernel_filename)
if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
0, EM_RISCV, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);
}

2
hw/riscv/spike.c
View File

@ -64,7 +64,7 @@ static uint64_t load_kernel(const char *kernel_filename)
uint64_t kernel_entry, kernel_high;
if (load_elf_ram_sym(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high, 0, ELF_MACHINE, 1, 0,
&kernel_entry, NULL, &kernel_high, 0, EM_RISCV, 1, 0,
NULL, true, htif_symbol_callback) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);

2
hw/riscv/virt.c
View File

@ -68,7 +68,7 @@ static uint64_t load_kernel(const char *kernel_filename)
if (load_elf(kernel_filename, NULL, NULL,
&kernel_entry, NULL, &kernel_high,
0, ELF_MACHINE, 1, 0) < 0) {
0, EM_RISCV, 1, 0) < 0) {
error_report("qemu: could not load kernel '%s'", kernel_filename);
exit(1);
}

1
target/riscv/cpu.h
View File

@ -34,7 +34,6 @@
#define TCG_GUEST_DEFAULT_MO 0
#define ELF_MACHINE EM_RISCV
#define CPUArchState struct CPURISCVState
#include "qemu-common.h"