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m68k: implement more ColdFire 5208 interrupt controller functionality 

Implement the SIMR and CIMR registers of the 5208 interrupt controller.
These are used by modern versions of Linux running on ColdFire (not sure
of the exact version they were introduced, but they have been in for quite
a while now).

Without this change when attempting to run a linux-3.5 kernel you will
see:

  qemu: hardware error: mcf_intc_write: Bad write offset 28

and execution will stop and dump out.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Laurent Vivier <laurent@vivier.eu>
Message-id: 1434721406-25288-2-git-send-email-gerg@uclinux.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Greg Ungerer 2015-06-19 23:43:24 +10:00 committed by Peter Maydell
parent 0a3346f5de
commit 8c52f0cbba
1 changed files with 14 additions and 0 deletions
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14
hw/m68k/mcf_intc.c
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@ -102,6 +102,20 @@ static void mcf_intc_write(void *opaque, hwaddr addr,
case 0x0c:
s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val;
break;
case 0x1c:
if (val & 0x40) {
s->imr = ~0ull;
} else {
s->imr |= (0x1ull << (val & 0x3f));
}
break;
case 0x1d:
if (val & 0x40) {
s->imr = 0ull;
} else {
s->imr &= ~(0x1ull << (val & 0x3f));
}
break;
default:
hw_error("mcf_intc_write: Bad write offset %d\n", offset);
break;