mirror of https://gitee.com/openkylin/qemu.git
target-ppc: Extract 40x aliases
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -6852,8 +6852,6 @@ enum {
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CPU_POWERPC_XIPCHIP = xxx,
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#endif
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/* PowerPC 403 family */
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/* Generic PowerPC 403 */
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#define CPU_POWERPC_403 CPU_POWERPC_403GC
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/* PowerPC 403 microcontrollers */
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CPU_POWERPC_403GA = 0x00200011,
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CPU_POWERPC_403GB = 0x00200100,
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@ -6863,8 +6861,6 @@ enum {
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CPU_POWERPC_403GP = xxx,
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#endif
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/* PowerPC 405 family */
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/* Generic PowerPC 405 */
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#define CPU_POWERPC_405 CPU_POWERPC_405D4
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/* PowerPC 405 cores */
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#if 0
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CPU_POWERPC_405A3 = xxx,
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@ -6906,7 +6902,6 @@ enum {
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#endif
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/* PowerPC 405 microcontrolers */
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/* XXX: missing 0x200108a0 */
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#define CPU_POWERPC_405CR CPU_POWERPC_405CRc
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CPU_POWERPC_405CRa = 0x40110041,
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CPU_POWERPC_405CRb = 0x401100C5,
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CPU_POWERPC_405CRc = 0x40110145,
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@ -6918,7 +6913,6 @@ enum {
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#if 0
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CPU_POWERPC_405FX = xxx,
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#endif
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#define CPU_POWERPC_405GP CPU_POWERPC_405GPd
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CPU_POWERPC_405GPa = 0x40110000,
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CPU_POWERPC_405GPb = 0x40110040,
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CPU_POWERPC_405GPc = 0x40110082,
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@ -6979,9 +6973,7 @@ enum {
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#endif
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/* Xilinx cores */
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CPU_POWERPC_X2VP4 = 0x20010820,
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#define CPU_POWERPC_X2VP7 CPU_POWERPC_X2VP4
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CPU_POWERPC_X2VP20 = 0x20010860,
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#define CPU_POWERPC_X2VP50 CPU_POWERPC_X2VP20
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#if 0
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CPU_POWERPC_ZL10310 = xxx,
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#endif
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@ -7701,8 +7693,6 @@ static const ppc_def_t ppc_defs[] = {
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POWERPC_DEF("Xipchip", CPU_POWERPC_XIPCHIP, 401)
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#endif
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/* PowerPC 403 family */
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/* Generic PowerPC 403 */
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POWERPC_DEF("403", CPU_POWERPC_403, 403)
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/* PowerPC 403 microcontrolers */
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/* PowerPC 403 GA */
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POWERPC_DEF("403GA", CPU_POWERPC_403GA, 403)
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@ -7717,8 +7707,6 @@ static const ppc_def_t ppc_defs[] = {
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POWERPC_DEF("403GP", CPU_POWERPC_403GP, 403)
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#endif
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/* PowerPC 405 family */
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/* Generic PowerPC 405 */
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POWERPC_DEF("405", CPU_POWERPC_405, 405)
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/* PowerPC 405 cores */
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#if defined (TODO)
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/* PowerPC 405 A3 */
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@ -7773,8 +7761,6 @@ static const ppc_def_t ppc_defs[] = {
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POWERPC_DEF("405F6", CPU_POWERPC_405F6, 405)
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#endif
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/* PowerPC 405 microcontrolers */
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/* PowerPC 405 CR */
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POWERPC_DEF("405CR", CPU_POWERPC_405CR, 405)
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/* PowerPC 405 CRa */
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POWERPC_DEF("405CRa", CPU_POWERPC_405CRa, 405)
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/* PowerPC 405 CRb */
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@ -7793,8 +7779,6 @@ static const ppc_def_t ppc_defs[] = {
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/* PowerPC 405 FX */
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POWERPC_DEF("405FX", CPU_POWERPC_405FX, 405)
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#endif
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/* PowerPC 405 GP */
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POWERPC_DEF("405GP", CPU_POWERPC_405GP, 405)
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/* PowerPC 405 GPa */
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POWERPC_DEF("405GPa", CPU_POWERPC_405GPa, 405)
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/* PowerPC 405 GPb */
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@ -7880,9 +7864,7 @@ static const ppc_def_t ppc_defs[] = {
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#endif
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/* Xilinx PowerPC 405 cores */
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POWERPC_DEF("x2vp4", CPU_POWERPC_X2VP4, 405)
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POWERPC_DEF("x2vp7", CPU_POWERPC_X2VP7, 405)
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POWERPC_DEF("x2vp20", CPU_POWERPC_X2VP20, 405)
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POWERPC_DEF("x2vp50", CPU_POWERPC_X2VP50, 405)
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#if defined (TODO)
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/* Zarlink ZL10310 */
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POWERPC_DEF("zl10310", CPU_POWERPC_ZL10310, 405)
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@ -9160,6 +9142,13 @@ typedef struct PowerPCCPUAlias {
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} PowerPCCPUAlias;
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static const PowerPCCPUAlias ppc_cpu_aliases[] = {
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{ "403", "403GC" },
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{ "405", "405D4" },
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{ "405CR", "405CRc" },
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{ "405GP", "405GPd" },
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{ "x2vp7", "x2vp4" },
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{ "x2vp50", "x2vp20" },
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{ "RCPU", "MPC5xx" },
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/* MPC5xx microcontrollers */
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{ "MGT560", "MPC5xx" },
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