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tcg/mips: Do not assert on relocation overflow 

This target was not updated with 7ecd02a06f, and so did
not allow re-compilation with relocation overflow.

Remove reloc_26 and reloc_26_val as unused.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2020-11-04 13:38:10 -08:00
parent d1861aa409
commit 91a7fd1fb6
1 changed files with 19 additions and 34 deletions
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53
tcg/mips/tcg-target.c.inc
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@ -144,29 +144,15 @@ static tcg_insn_unit *bswap32_addr;
static tcg_insn_unit *bswap32u_addr; static tcg_insn_unit *bswap32u_addr;
static tcg_insn_unit *bswap64_addr; static tcg_insn_unit *bswap64_addr;
static inline uint32_t reloc_pc16_val(tcg_insn_unit *pc, static bool reloc_pc16(tcg_insn_unit *pc, const tcg_insn_unit *target)
const tcg_insn_unit *target)
{ {
/* Let the compiler perform the right-shift as part of the arithmetic. */ /* Let the compiler perform the right-shift as part of the arithmetic. */
ptrdiff_t disp = target - (pc + 1); ptrdiff_t disp = target - (pc + 1);
tcg_debug_assert(disp == (int16_t)disp); if (disp == (int16_t)disp) {
return disp & 0xffff; *pc = deposit32(*pc, 0, 16, disp);
} return true;
}
static inline void reloc_pc16(tcg_insn_unit *pc, const tcg_insn_unit *target) return false;
{
*pc = deposit32(*pc, 0, 16, reloc_pc16_val(pc, target));
}
static inline uint32_t reloc_26_val(tcg_insn_unit *pc, tcg_insn_unit *target)
{
tcg_debug_assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);
return ((uintptr_t)target >> 2) & 0x3ffffff;
}
static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)
{
*pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target));
} }
static bool patch_reloc(tcg_insn_unit *code_ptr, int type, static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
@ -174,8 +160,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
{ {
tcg_debug_assert(type == R_MIPS_PC16); tcg_debug_assert(type == R_MIPS_PC16);
tcg_debug_assert(addend == 0); tcg_debug_assert(addend == 0);
reloc_pc16(code_ptr, (tcg_insn_unit *)value); return reloc_pc16(code_ptr, (const tcg_insn_unit *)value);
return true;
} }
#define TCG_CT_CONST_ZERO 0x100 #define TCG_CT_CONST_ZERO 0x100
@ -925,11 +910,7 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
} }
tcg_out_opc_br(s, b_opc, arg1, arg2); tcg_out_opc_br(s, b_opc, arg1, arg2);
if (l->has_value) { tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, l, 0);
reloc_pc16(s->code_ptr - 1, l->u.value_ptr);
} else {
tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, l, 0);
}
tcg_out_nop(s); tcg_out_nop(s);
} }
@ -1316,9 +1297,10 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
int i; int i;
/* resolve label address */ /* resolve label address */
reloc_pc16(l->label_ptr[0], s->code_ptr); if (!reloc_pc16(l->label_ptr[0], s->code_ptr)
if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS
reloc_pc16(l->label_ptr[1], s->code_ptr); && !reloc_pc16(l->label_ptr[1], s->code_ptr))) {
return false;
} }
i = 1; i = 1;
@ -1346,7 +1328,9 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
} }
tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO); tcg_out_opc_br(s, OPC_BEQ, TCG_REG_ZERO, TCG_REG_ZERO);
reloc_pc16(s->code_ptr - 1, l->raddr); if (!reloc_pc16(s->code_ptr - 1, l->raddr)) {
return false;
}
/* delay slot */ /* delay slot */
if (TCG_TARGET_REG_BITS == 64 && l->type == TCG_TYPE_I32) { if (TCG_TARGET_REG_BITS == 64 && l->type == TCG_TYPE_I32) {
@ -1366,9 +1350,10 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
int i; int i;
/* resolve label address */ /* resolve label address */
reloc_pc16(l->label_ptr[0], s->code_ptr); if (!reloc_pc16(l->label_ptr[0], s->code_ptr)
if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { || (TCG_TARGET_REG_BITS < TARGET_LONG_BITS
reloc_pc16(l->label_ptr[1], s->code_ptr); && !reloc_pc16(l->label_ptr[1], s->code_ptr))) {
return false;
} }
i = 1; i = 1;