mirror of https://gitee.com/openkylin/qemu.git
target-arm: Remove old code and replace with new functions
Remove the old PMCCNTR code and replace it with calls to the new pmccntr_sync() and arm_ccnt_enabled() functions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 693a6e437d915c2195fd3dc7303f384ca538b7bf.1409025949.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -580,20 +580,7 @@ void pmccntr_sync(CPUARMState *env)
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static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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uint64_t value)
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{
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uint64_t temp_ticks;
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temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
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get_ticks_per_sec(), 1000000);
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if (env->cp15.c9_pmcr & PMCRE) {
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/* If the counter is enabled */
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if (env->cp15.c9_pmcr & PMCRD) {
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/* Increment once every 64 processor clock cycles */
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env->cp15.c15_ccnt = (temp_ticks/64) - env->cp15.c15_ccnt;
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} else {
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env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt;
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}
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}
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pmccntr_sync(env);
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if (value & PMCRC) {
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/* The counter has been reset */
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@ -604,20 +591,14 @@ static void pmcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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env->cp15.c9_pmcr &= ~0x39;
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env->cp15.c9_pmcr |= (value & 0x39);
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if (env->cp15.c9_pmcr & PMCRE) {
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if (env->cp15.c9_pmcr & PMCRD) {
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/* Increment once every 64 processor clock cycles */
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temp_ticks /= 64;
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}
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env->cp15.c15_ccnt = temp_ticks - env->cp15.c15_ccnt;
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}
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pmccntr_sync(env);
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}
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static uint64_t pmccntr_read(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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uint64_t total_ticks;
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if (!(env->cp15.c9_pmcr & PMCRE)) {
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if (!arm_ccnt_enabled(env)) {
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/* Counter is disabled, do not change value */
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return env->cp15.c15_ccnt;
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}
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@ -637,7 +618,7 @@ static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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{
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uint64_t total_ticks;
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if (!(env->cp15.c9_pmcr & PMCRE)) {
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if (!arm_ccnt_enabled(env)) {
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/* Counter is disabled, set the absolute value */
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env->cp15.c15_ccnt = value;
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return;
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