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tcg/x86: add not/neg/extu/bswap/rot i32 ops 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-03-10 19:37:46 +00:00
parent 7fc8105195
commit 9619376c1b
2 changed files with 48 additions and 1 deletions
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41
tcg/i386/tcg-target.c
View File

@ -158,6 +158,8 @@ static inline int tcg_target_const_match(tcg_target_long val,
#define ARITH_XOR 6
#define ARITH_CMP 7
#define SHIFT_ROL 0
#define SHIFT_ROR 1
#define SHIFT_SHL 4
#define SHIFT_SHR 5
#define SHIFT_SAR 7
@ -998,7 +1000,13 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_sar_i32:
c = SHIFT_SAR;
goto gen_shift32;
case INDEX_op_rotl_i32:
c = SHIFT_ROL;
goto gen_shift32;
case INDEX_op_rotr_i32:
c = SHIFT_ROR;
goto gen_shift32;
case INDEX_op_add2_i32:
if (const_args[4])
tgen_arithi(s, ARITH_ADD, args[0], args[4]);
@ -1026,6 +1034,25 @@ static inline void tcg_out_op(TCGContext *s, int opc,
tcg_out_brcond2(s, args, const_args);
break;
case INDEX_op_bswap_i32:
tcg_out_opc(s, (0xc8 + args[0]) | P_EXT);
break;
case INDEX_op_neg_i32:
tcg_out_modrm(s, 0xf7, 3, args[0]);
break;
case INDEX_op_not_i32:
tcg_out_modrm(s, 0xf7, 2, args[0]);
break;
case INDEX_op_ext8s_i32:
tcg_out_modrm(s, 0xbe | P_EXT, args[0], args[1]);
break;
case INDEX_op_ext16s_i32:
tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
break;
@ -1093,6 +1120,9 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_shl_i32, { "r", "0", "ci" } },
{ INDEX_op_shr_i32, { "r", "0", "ci" } },
{ INDEX_op_sar_i32, { "r", "0", "ci" } },
{ INDEX_op_sar_i32, { "r", "0", "ci" } },
{ INDEX_op_rotl_i32, { "r", "0", "ci" } },
{ INDEX_op_rotr_i32, { "r", "0", "ci" } },
{ INDEX_op_brcond_i32, { "r", "ri" } },
@ -1100,6 +1130,15 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
{ INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
{ INDEX_op_bswap_i32, { "r", "0" } },
{ INDEX_op_neg_i32, { "r", "0" } },
{ INDEX_op_not_i32, { "r", "0" } },
{ INDEX_op_ext8s_i32, { "r", "q" } },
{ INDEX_op_ext16s_i32, { "r", "r" } },
#if TARGET_LONG_BITS == 32
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },

8
tcg/i386/tcg-target.h
View File

@ -44,6 +44,14 @@ enum {
#define TCG_TARGET_STACK_ALIGN 16
#define TCG_TARGET_CALL_STACK_OFFSET 0
/* optional instructions */
#define TCG_TARGET_HAS_bswap_i32
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_not_i32
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_rot_i32
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_EBP
#define TCG_AREG1 TCG_REG_EBX