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target-microblaze: mmu: Remove unused register state 

Add explicit handling for MMU_R_TLBX and log accesses to
invalid MMU registers. We can now remove the state for
all regs but PID, ZPR and TLBX (0 - 2).

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Edgar E. Iglesias 2018-04-15 23:25:58 +02:00
parent a2207b593b
commit 96716533af
2 changed files with 6 additions and 3 deletions
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7
target/microblaze/mmu.c
View File

@ -211,11 +211,14 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
} }
r = env->mmu.regs[rn]; r = env->mmu.regs[rn];
break; break;
case MMU_R_TLBX:
r = env->mmu.regs[rn];
break;
case MMU_R_TLBSX: case MMU_R_TLBSX:
qemu_log_mask(LOG_GUEST_ERROR, "TLBSX is write-only.\n"); qemu_log_mask(LOG_GUEST_ERROR, "TLBSX is write-only.\n");
break; break;
default: default:
r = env->mmu.regs[rn]; qemu_log_mask(LOG_GUEST_ERROR, "Invalid MMU register %d.\n", rn);
break; break;
} }
D(qemu_log("%s rn=%d=%x\n", __func__, rn, r)); D(qemu_log("%s rn=%d=%x\n", __func__, rn, r));
@ -298,7 +301,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
break; break;
} }
default: default:
env->mmu.regs[rn] = v; qemu_log_mask(LOG_GUEST_ERROR, "Invalid MMU register %d.\n", rn);
break; break;
} }
} }

2
target/microblaze/mmu.h
View File

@ -67,7 +67,7 @@ struct microblaze_mmu
/* We keep a separate ram for the tids to avoid the 48 bit tag width. */ /* We keep a separate ram for the tids to avoid the 48 bit tag width. */
uint8_t tids[TLB_ENTRIES]; uint8_t tids[TLB_ENTRIES];
/* Control flops. */ /* Control flops. */
uint32_t regs[8]; uint32_t regs[3];
int c_mmu; int c_mmu;
int c_mmu_tlb_access; int c_mmu_tlb_access;