mirror of https://gitee.com/openkylin/qemu.git
new segment access
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@255 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
d8bc1fd0ae
commit
970a87a6bb
20
cpu-exec.c
20
cpu-exec.c
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@ -178,21 +178,21 @@ int cpu_exec(CPUState *env1)
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/* we compute the CPU state. We assume it will not
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change during the whole generated block. */
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#if defined(TARGET_I386)
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flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
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flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT;
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flags |= (((unsigned long)env->seg_cache[R_DS].base |
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(unsigned long)env->seg_cache[R_ES].base |
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(unsigned long)env->seg_cache[R_SS].base) != 0) <<
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flags = env->segs[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
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flags |= env->segs[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT;
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flags |= (((unsigned long)env->segs[R_DS].base |
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(unsigned long)env->segs[R_ES].base |
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(unsigned long)env->segs[R_SS].base) != 0) <<
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GEN_FLAG_ADDSEG_SHIFT;
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if (!(env->eflags & VM_MASK)) {
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flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT;
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flags |= (env->segs[R_CS].selector & 3) << GEN_FLAG_CPL_SHIFT;
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} else {
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/* NOTE: a dummy CPL is kept */
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flags |= (1 << GEN_FLAG_VM_SHIFT);
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flags |= (3 << GEN_FLAG_CPL_SHIFT);
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}
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flags |= (env->eflags & (IOPL_MASK | TF_MASK));
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cs_base = env->seg_cache[R_CS].base;
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cs_base = env->segs[R_CS].base;
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pc = cs_base + env->eip;
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#elif defined(TARGET_ARM)
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flags = 0;
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@ -347,13 +347,13 @@ void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
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if (env->eflags & VM_MASK) {
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SegmentCache *sc;
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selector &= 0xffff;
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sc = &env->seg_cache[seg_reg];
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sc = &env->segs[seg_reg];
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/* NOTE: in VM86 mode, limit and seg_32bit are never reloaded,
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so we must load them here */
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sc->base = (void *)(selector << 4);
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sc->limit = 0xffff;
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sc->seg_32bit = 0;
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env->segs[seg_reg] = selector;
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sc->selector = selector;
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} else {
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load_seg(seg_reg, selector, 0);
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}
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@ -426,7 +426,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
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return 0;
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#if defined(TARGET_I386)
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env->eip = found_pc - tb->cs_base;
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env->cr2 = address;
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env->cr[2] = address;
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/* we restore the process signal mask as the sigreturn should
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do it (XXX: use sigsetjmp) */
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sigprocmask(SIG_SETMASK, old_set, NULL);
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@ -176,7 +176,7 @@ void cpu_loop(CPUX86State *env)
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info.si_code = TARGET_SEGV_MAPERR;
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else
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info.si_code = TARGET_SEGV_ACCERR;
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info._sifields._sigfault._addr = env->cr2;
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info._sifields._sigfault._addr = env->cr[2];
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queue_signal(info.si_signo, &info);
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break;
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case EXCP00_DIVZ:
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@ -231,7 +231,7 @@ void cpu_loop(CPUX86State *env)
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/* just indicate that signals should be handled asap */
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break;
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default:
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pc = env->seg_cache[R_CS].base + env->eip;
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pc = env->segs[R_CS].base + env->eip;
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fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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(long)pc, trapnr);
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abort();
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@ -828,7 +828,7 @@ void OPPROTO glue(glue(op_bsr, SUFFIX), _T0_cc)(void)
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#define STRING_SUFFIX _a32
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#define SI_ADDR (uint8_t *)A0 + ESI
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#define DI_ADDR env->seg_cache[R_ES].base + EDI
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#define DI_ADDR env->segs[R_ES].base + EDI
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#define INC_SI() ESI += inc
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#define INC_DI() EDI += inc
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#define CX ECX
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@ -837,7 +837,7 @@ void OPPROTO glue(glue(op_bsr, SUFFIX), _T0_cc)(void)
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#define STRING_SUFFIX _a16
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#define SI_ADDR (uint8_t *)A0 + (ESI & 0xffff)
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#define DI_ADDR env->seg_cache[R_ES].base + (EDI & 0xffff)
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#define DI_ADDR env->segs[R_ES].base + (EDI & 0xffff)
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#define INC_SI() ESI = (ESI & ~0xffff) | ((ESI + inc) & 0xffff)
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#define INC_DI() EDI = (EDI & ~0xffff) | ((EDI + inc) & 0xffff)
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#define CX (ECX & 0xffff)
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