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target-ppc: Bug Fix: mulldo OV Detection 

Fix the code to properly detect overflow; the 128 bit signed
product must have all zeroes or all ones in the first 65 bits
otherwise OV should be set.

Example:

R3 45F086A5D5887509
R4 0000000000000002
mulldo 3,3,4

Should set XER[OV].

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-08-12 08:45:08 -05:00 committed by Alexander Graf
parent 1fa74845f2
commit 9824d01d5d
1 changed files with 12 additions and 2 deletions
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14
target-ppc/int_helper.c
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@ -32,12 +32,22 @@ uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2)
uint64_t tl;
muls64(&tl, (uint64_t *)&th, arg1, arg2);
/* If th != 0 && th != -1, then we had an overflow */
if (likely((uint64_t)(th + 1) <= 1)) {
/* th should either contain all 1 bits or all 0 bits and should
* match the sign bit of tl; otherwise we have overflowed. */
if ((int64_t)tl < 0) {
if (likely(th == -1LL)) {
env->ov = 0;
} else {
env->so = env->ov = 1;
}
} else if (likely(th == 0LL)) {
env->ov = 0;
} else {
env->so = env->ov = 1;
}
return (int64_t)tl;
}
#endif