mirror of https://gitee.com/openkylin/qemu.git
Sparc32: port sun4c interrupt controller to VMState design
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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f4b19cd021
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@ -169,26 +169,17 @@ static void sun4c_set_irq(void *opaque, int irq, int level)
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}
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}
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}
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}
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static void sun4c_intctl_save(QEMUFile *f, void *opaque)
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static const VMStateDescription vmstate_sun4c_intctl = {
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{
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.name ="sun4c_intctl",
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Sun4c_INTCTLState *s = opaque;
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.version_id = 1,
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.minimum_version_id = 1,
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qemu_put_8s(f, &s->reg);
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.minimum_version_id_old = 1,
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qemu_put_8s(f, &s->pending);
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.fields = (VMStateField []) {
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}
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VMSTATE_UINT8(reg, Sun4c_INTCTLState),
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VMSTATE_UINT8(pending, Sun4c_INTCTLState),
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static int sun4c_intctl_load(QEMUFile *f, void *opaque, int version_id)
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VMSTATE_END_OF_LIST()
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{
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}
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Sun4c_INTCTLState *s = opaque;
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};
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if (version_id != 1)
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return -EINVAL;
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qemu_get_8s(f, &s->reg);
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qemu_get_8s(f, &s->pending);
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return 0;
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}
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static void sun4c_intctl_reset(void *opaque)
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static void sun4c_intctl_reset(void *opaque)
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{
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{
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@ -212,8 +203,7 @@ static int sun4c_intctl_init1(SysBusDevice *dev)
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for (i = 0; i < MAX_PILS; i++) {
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for (i = 0; i < MAX_PILS; i++) {
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sysbus_init_irq(dev, &s->cpu_irqs[i]);
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sysbus_init_irq(dev, &s->cpu_irqs[i]);
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}
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}
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register_savevm("sun4c_intctl", -1, 1, sun4c_intctl_save,
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vmstate_register(-1, &vmstate_sun4c_intctl, s);
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sun4c_intctl_load, s);
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qemu_register_reset(sun4c_intctl_reset, s);
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qemu_register_reset(sun4c_intctl_reset, s);
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sun4c_intctl_reset(s);
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sun4c_intctl_reset(s);
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return 0;
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return 0;
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