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target-ppc: don't invalidate msr MSR_HVB bit in cpu_post_load 

The invalidation code introduced in commit 2360b works by inverting most bits
of env->msr to ensure that hreg_store_msr() will forcibly update the CPU env
state to reflect the new msr value post-migration. Unfortunately
hreg_store_msr() is called with alter_hv set to 0 which preserves the MSR_HVB
state from the CPU env which is now the opposite value to what it should be.

Ensure that we don't invalidate the msr MSR_HVB bit during cpu_post_load so
that the correct value is restored. This fixes suspend/resume for PPC64.

Reported-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alexander Graf <agraf@suse.de>
Message-id: 1429255009-12751-1-git-send-email-mark.cave-ayland@ilande.co.uk
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Mark Cave-Ayland 2015-04-17 08:16:49 +01:00 committed by Peter Maydell
parent b8df9208f3
commit 993ebe4a0b
1 changed files with 2 additions and 2 deletions
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4
target-ppc/machine.c
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@ -192,9 +192,9 @@ static int cpu_post_load(void *opaque, int version_id)
ppc_store_sdr1(env, env->spr[SPR_SDR1]);
}
/* Mark msr bits except MSR_TGPR invalid before restoring */
/* Invalidate all msr bits except MSR_TGPR/MSR_HVB before restoring */
msr = env->msr;
env->msr ^= ~(1ULL << MSR_TGPR);
env->msr ^= ~((1ULL << MSR_TGPR) | MSR_HVB);
ppc_store_msr(env, msr);
hreg_compute_mem_idx(env);