mirror of https://gitee.com/openkylin/qemu.git
tcg: Allow extra data to be attached to insn_start
With an eye toward having this data replace the gen_opc_* arrays that each target collects in order to enable restore_state_from_tb. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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54
tcg/tcg-op.h
54
tcg/tcg-op.h
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@ -700,17 +700,53 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
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#error must include QEMU headers
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#endif
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/* debug info: write the PC of the corresponding QEMU CPU instruction */
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static inline void tcg_gen_insn_start(uint64_t pc)
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#if TARGET_INSN_START_WORDS == 1
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc)
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{
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/* XXX: must really use a 32 bit size for TCGArg in all cases */
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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tcg_gen_op2ii(INDEX_op_insn_start,
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(uint32_t)(pc), (uint32_t)(pc >> 32));
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#else
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tcg_gen_op1i(INDEX_op_insn_start, pc);
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#endif
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tcg_gen_op1(&tcg_ctx, INDEX_op_insn_start, pc);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc)
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{
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tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start,
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(uint32_t)pc, (uint32_t)(pc >> 32));
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}
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# endif
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#elif TARGET_INSN_START_WORDS == 2
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
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{
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tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, pc, a1);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
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{
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tcg_gen_op4(&tcg_ctx, INDEX_op_insn_start,
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(uint32_t)pc, (uint32_t)(pc >> 32),
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(uint32_t)a1, (uint32_t)(a1 >> 32));
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}
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# endif
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#elif TARGET_INSN_START_WORDS == 3
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
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target_ulong a2)
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{
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tcg_gen_op3(&tcg_ctx, INDEX_op_insn_start, pc, a1, a2);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
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target_ulong a2)
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{
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tcg_gen_op6(&tcg_ctx, INDEX_op_insn_start,
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(uint32_t)pc, (uint32_t)(pc >> 32),
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(uint32_t)a1, (uint32_t)(a1 >> 32),
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(uint32_t)a2, (uint32_t)(a2 >> 32));
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}
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# endif
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#else
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# error "Unhandled number of operands to insn_start"
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#endif
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static inline void tcg_gen_exit_tb(uintptr_t val)
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{
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@ -175,9 +175,9 @@ DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64))
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/* QEMU specific */
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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DEF(insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
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DEF(insn_start, 0, 0, 2 * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
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#else
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DEF(insn_start, 0, 0, 1, TCG_OPF_NOT_PRESENT)
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DEF(insn_start, 0, 0, TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
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#endif
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DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END)
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DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END)
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13
tcg/tcg.c
13
tcg/tcg.c
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@ -991,16 +991,17 @@ void tcg_dump_ops(TCGContext *s)
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args = &s->gen_opparam_buf[op->args];
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if (c == INDEX_op_insn_start) {
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uint64_t pc;
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qemu_log("%s ----", oi != s->gen_first_op_idx ? "\n" : "");
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for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
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target_ulong a;
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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pc = ((uint64_t)args[1] << 32) | args[0];
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a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
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#else
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pc = args[0];
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a = args[i];
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#endif
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if (oi != s->gen_first_op_idx) {
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qemu_log("\n");
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qemu_log(" " TARGET_FMT_lx, a);
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}
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qemu_log(" ---- 0x%" PRIx64, pc);
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} else if (c == INDEX_op_call) {
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/* variable number of arguments */
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nb_oargs = op->callo;
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@ -129,6 +129,12 @@ typedef uint64_t TCGRegSet;
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# error "Missing unsigned widening multiply"
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#endif
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#ifndef TARGET_INSN_START_EXTRA_WORDS
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# define TARGET_INSN_START_WORDS 1
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#else
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# define TARGET_INSN_START_WORDS (1 + TARGET_INSN_START_EXTRA_WORDS)
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#endif
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typedef enum TCGOpcode {
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#define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
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#include "tcg-opc.h"
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