From 9b253fe5544672a48a4c22fb1535a7f581321871 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 23 Oct 2019 11:00:47 -0400 Subject: [PATCH] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By performing this store early, we avoid having to save and restore the register holding the address around any function calls. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson Message-id: 20191023150057.25731-15-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 3f7d3f257d..37424e3d4d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11225,6 +11225,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, { uint32_t flags, pstate_for_ss; + *cs_base = 0; flags = rebuild_hflags_internal(env); if (is_a64(env)) { @@ -11298,7 +11299,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } *pflags = flags; - *cs_base = 0; } #ifdef TARGET_AARCH64