mirror of https://gitee.com/openkylin/qemu.git
Merge remote-tracking branch 'jliu/or32' into staging
# By Jia Liu # Via Jia Liu * jliu/or32: hw/openrisc: Avoid undefined shift in openrisc_pic_cpu_handler() hw/openrisc: Fix masking in openrisc_pic_cpu_handler() hw/openrisc: Avoid using uninitialised variable 'entry' Message-id: 1377050811-11116-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
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commit
9fe480695a
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@ -86,9 +86,8 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
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kernel_filename);
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kernel_filename);
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exit(1);
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exit(1);
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}
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}
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cpu->env.pc = entry;
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}
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}
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cpu->env.pc = entry;
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}
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}
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static void openrisc_sim_init(QEMUMachineInitArgs *args)
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static void openrisc_sim_init(QEMUMachineInitArgs *args)
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@ -26,26 +26,25 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
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{
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{
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OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
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OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
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CPUState *cs = CPU(cpu);
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CPUState *cs = CPU(cpu);
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int i;
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uint32_t irq_bit;
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uint32_t irq_bit = 1 << irq;
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if (irq > 31 || irq < 0) {
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if (irq > 31 || irq < 0) {
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return;
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return;
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}
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}
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irq_bit = 1U << irq;
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if (level) {
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if (level) {
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cpu->env.picsr |= irq_bit;
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cpu->env.picsr |= irq_bit;
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} else {
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} else {
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cpu->env.picsr &= ~irq_bit;
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cpu->env.picsr &= ~irq_bit;
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}
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}
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for (i = 0; i < 32; i++) {
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if (cpu->env.picsr & cpu->env.picmr) {
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if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) {
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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} else {
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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cpu->env.picsr = 0;
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cpu->env.picsr &= ~(1 << i);
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}
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}
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}
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}
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}
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