mirror of https://gitee.com/openkylin/qemu.git
ppc: Don't update NIP in DCR access routines
This is no longer necessary as the helpers will properly retrieve the return address when needed Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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0f72b7c682
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a13f0a9bc4
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@ -19,6 +19,7 @@
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "qemu/log.h"
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/*****************************************************************************/
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@ -143,15 +144,16 @@ target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
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if (unlikely(env->dcr_env == NULL)) {
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qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
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helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL, GETPC());
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} else if (unlikely(ppc_dcr_read(env->dcr_env,
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(uint32_t)dcrn, &val) != 0)) {
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qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
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(uint32_t)dcrn, (uint32_t)dcrn);
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helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_PRIV_REG, GETPC());
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}
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return val;
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}
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@ -160,14 +162,15 @@ void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
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{
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if (unlikely(env->dcr_env == NULL)) {
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qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
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helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL, GETPC());
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} else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
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(uint32_t)val) != 0)) {
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qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
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(uint32_t)dcrn, (uint32_t)dcrn);
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helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_PRIV_REG, GETPC());
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}
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}
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@ -5498,8 +5498,6 @@ static void gen_mfdcr(DisasContext *ctx)
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TCGv dcrn;
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CHK_SV;
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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dcrn = tcg_const_tl(SPR(ctx->opcode));
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gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env, dcrn);
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tcg_temp_free(dcrn);
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@ -5515,8 +5513,6 @@ static void gen_mtdcr(DisasContext *ctx)
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TCGv dcrn;
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CHK_SV;
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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dcrn = tcg_const_tl(SPR(ctx->opcode));
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gen_helper_store_dcr(cpu_env, dcrn, cpu_gpr[rS(ctx->opcode)]);
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tcg_temp_free(dcrn);
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@ -5531,8 +5527,6 @@ static void gen_mfdcrx(DisasContext *ctx)
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GEN_PRIV;
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#else
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CHK_SV;
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env,
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cpu_gpr[rA(ctx->opcode)]);
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/* Note: Rc update flag set leads to undefined state of Rc0 */
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@ -5547,8 +5541,6 @@ static void gen_mtdcrx(DisasContext *ctx)
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GEN_PRIV;
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#else
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CHK_SV;
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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gen_helper_store_dcr(cpu_env, cpu_gpr[rA(ctx->opcode)],
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cpu_gpr[rS(ctx->opcode)]);
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/* Note: Rc update flag set leads to undefined state of Rc0 */
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@ -5558,8 +5550,6 @@ static void gen_mtdcrx(DisasContext *ctx)
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/* mfdcrux (PPC 460) : user-mode access to DCR */
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static void gen_mfdcrux(DisasContext *ctx)
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{
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env,
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cpu_gpr[rA(ctx->opcode)]);
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/* Note: Rc update flag set leads to undefined state of Rc0 */
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@ -5568,8 +5558,6 @@ static void gen_mfdcrux(DisasContext *ctx)
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/* mtdcrux (PPC 460) : user-mode access to DCR */
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static void gen_mtdcrux(DisasContext *ctx)
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{
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/* NIP cannot be restored if the memory exception comes from an helper */
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gen_update_nip(ctx, ctx->nip - 4);
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gen_helper_store_dcr(cpu_env, cpu_gpr[rA(ctx->opcode)],
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cpu_gpr[rS(ctx->opcode)]);
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/* Note: Rc update flag set leads to undefined state of Rc0 */
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