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target/ppc: Convert to 3-phase reset 

Convert the ppc CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-id: 20221124115023.2437291-14-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-11-24 11:50:16 +00:00
parent 0409750479
commit a1c5d644b7
2 changed files with 10 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/ppc/cpu-qom.h
View File

@ -143,7 +143,7 @@ typedef struct PPCHash64Options PPCHash64Options;
/** /**
* PowerPCCPUClass: * PowerPCCPUClass:
* @parent_realize: The parent class' realize handler. * @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler. * @parent_phases: The parent class' reset phase handlers.
* *
* A PowerPC CPU model. * A PowerPC CPU model.
*/ */
@ -154,7 +154,7 @@ struct PowerPCCPUClass {
DeviceRealize parent_realize; DeviceRealize parent_realize;
DeviceUnrealize parent_unrealize; DeviceUnrealize parent_unrealize;
DeviceReset parent_reset; ResettablePhases parent_phases;
void (*parent_parse_features)(const char *type, char *str, Error **errp); void (*parent_parse_features)(const char *type, char *str, Error **errp);
uint32_t pvr; uint32_t pvr;

12
target/ppc/cpu_init.c
View File

@ -7031,16 +7031,18 @@ static bool ppc_cpu_has_work(CPUState *cs)
return cs->interrupt_request & CPU_INTERRUPT_HARD; return cs->interrupt_request & CPU_INTERRUPT_HARD;
} }
static void ppc_cpu_reset(DeviceState *dev) static void ppc_cpu_reset_hold(Object *obj)
{ {
CPUState *s = CPU(dev); CPUState *s = CPU(obj);
PowerPCCPU *cpu = POWERPC_CPU(s); PowerPCCPU *cpu = POWERPC_CPU(s);
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
CPUPPCState *env = &cpu->env; CPUPPCState *env = &cpu->env;
target_ulong msr; target_ulong msr;
int i; int i;
pcc->parent_reset(dev); if (pcc->parent_phases.hold) {
pcc->parent_phases.hold(obj);
}
msr = (target_ulong)0; msr = (target_ulong)0;
msr |= (target_ulong)MSR_HVB; msr |= (target_ulong)MSR_HVB;
@ -7267,6 +7269,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc);
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
ResettableClass *rc = RESETTABLE_CLASS(oc);
device_class_set_parent_realize(dc, ppc_cpu_realize, device_class_set_parent_realize(dc, ppc_cpu_realize,
&pcc->parent_realize); &pcc->parent_realize);
@ -7275,7 +7278,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
pcc->pvr_match = ppc_pvr_match_default; pcc->pvr_match = ppc_pvr_match_default;
device_class_set_props(dc, ppc_cpu_properties); device_class_set_props(dc, ppc_cpu_properties);
device_class_set_parent_reset(dc, ppc_cpu_reset, &pcc->parent_reset); resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL,
&pcc->parent_phases);
cc->class_by_name = ppc_cpu_class_by_name; cc->class_by_name = ppc_cpu_class_by_name;
cc->has_work = ppc_cpu_has_work; cc->has_work = ppc_cpu_has_work;