mirror of https://gitee.com/openkylin/qemu.git
omap: eliminate l4_register_io_memory
This is a trivial wrapper around cpu_register_io_memory(), adding no value. Inline it into all callers. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -96,8 +96,6 @@ target_phys_addr_t omap_l4_attach(struct omap_target_agent_s *ta, int region,
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int iotype);
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target_phys_addr_t omap_l4_region_base(struct omap_target_agent_s *ta,
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int region);
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int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
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CPUWriteMemoryFunc * const *mem_write, void *opaque);
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/* OMAP2 SDRAM controller */
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struct omap_sdrc_s;
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12
hw/omap2.c
12
hw/omap2.c
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@ -784,8 +784,8 @@ static struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
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s->chr = chr ?: qemu_chr_new("null", "null", NULL);
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iomemtype = l4_register_io_memory(omap_sti_readfn,
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omap_sti_writefn, s);
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iomemtype = cpu_register_io_memory(omap_sti_readfn,
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omap_sti_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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iomemtype = cpu_register_io_memory(omap_sti_fifo_readfn,
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@ -1798,8 +1798,8 @@ static struct omap_prcm_s *omap_prcm_init(struct omap_target_agent_s *ta,
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s->mpu = mpu;
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omap_prcm_coldreset(s);
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iomemtype = l4_register_io_memory(omap_prcm_readfn,
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omap_prcm_writefn, s);
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iomemtype = cpu_register_io_memory(omap_prcm_readfn,
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omap_prcm_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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omap_l4_attach(ta, 1, iomemtype);
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@ -2168,8 +2168,8 @@ static struct omap_sysctl_s *omap_sysctl_init(struct omap_target_agent_s *ta,
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s->mpu = mpu;
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omap_sysctl_reset(s);
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iomemtype = l4_register_io_memory(omap_sysctl_readfn,
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omap_sysctl_writefn, s);
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iomemtype = cpu_register_io_memory(omap_sysctl_readfn,
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omap_sysctl_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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return s;
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@ -1037,14 +1037,14 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
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s->drq = drq;
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omap_dss_reset(s);
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iomemtype[0] = l4_register_io_memory(omap_diss1_readfn,
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omap_diss1_writefn, s);
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iomemtype[1] = l4_register_io_memory(omap_disc1_readfn,
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omap_disc1_writefn, s);
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iomemtype[2] = l4_register_io_memory(omap_rfbi1_readfn,
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omap_rfbi1_writefn, s);
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iomemtype[3] = l4_register_io_memory(omap_venc1_readfn,
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omap_venc1_writefn, s);
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iomemtype[0] = cpu_register_io_memory(omap_diss1_readfn,
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omap_diss1_writefn, s, DEVICE_NATIVE_ENDIAN);
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iomemtype[1] = cpu_register_io_memory(omap_disc1_readfn,
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omap_disc1_writefn, s, DEVICE_NATIVE_ENDIAN);
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iomemtype[2] = cpu_register_io_memory(omap_rfbi1_readfn,
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omap_rfbi1_writefn, s, DEVICE_NATIVE_ENDIAN);
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iomemtype[3] = cpu_register_io_memory(omap_venc1_readfn,
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omap_venc1_writefn, s, DEVICE_NATIVE_ENDIAN);
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iomemtype[4] = cpu_register_io_memory(omap_im3_readfn,
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omap_im3_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype[0]);
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@ -476,8 +476,8 @@ struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
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omap_gp_timer_reset(s);
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omap_gp_timer_clk_setup(s);
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iomemtype = l4_register_io_memory(omap_gp_timer_readfn,
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omap_gp_timer_writefn, s);
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iomemtype = cpu_register_io_memory(omap_gp_timer_readfn,
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omap_gp_timer_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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return s;
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@ -457,8 +457,8 @@ struct omap_i2c_s *omap2_i2c_init(struct omap_target_agent_s *ta,
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s->bus = i2c_init_bus(NULL, "i2c");
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omap_i2c_reset(s);
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iomemtype = l4_register_io_memory(omap_i2c_readfn,
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omap_i2c_writefn, s);
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iomemtype = cpu_register_io_memory(omap_i2c_readfn,
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omap_i2c_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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return s;
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12
hw/omap_l4.c
12
hw/omap_l4.c
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@ -20,14 +20,6 @@
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#include "hw.h"
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#include "omap.h"
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int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
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CPUWriteMemoryFunc * const *mem_write,
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void *opaque)
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{
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return cpu_register_io_memory(mem_read, mem_write, opaque,
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DEVICE_NATIVE_ENDIAN);
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}
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struct omap_l4_s {
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target_phys_addr_t base;
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int ta_num;
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@ -132,8 +124,8 @@ struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
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ta->status = 0x00000000;
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ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
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iomemtype = l4_register_io_memory(omap_l4ta_readfn,
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omap_l4ta_writefn, ta);
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iomemtype = cpu_register_io_memory(omap_l4ta_readfn,
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omap_l4ta_writefn, ta, DEVICE_NATIVE_ENDIAN);
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ta->base = omap_l4_attach(ta, info->ta_region, iomemtype);
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return ta;
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@ -612,8 +612,8 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_agent_s *ta,
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omap_mmc_reset(s);
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iomemtype = l4_register_io_memory(omap_mmc_readfn,
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omap_mmc_writefn, s);
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iomemtype = cpu_register_io_memory(omap_mmc_readfn,
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omap_mmc_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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/* Instantiate the storage */
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@ -327,8 +327,8 @@ struct omap_mcspi_s *omap_mcspi_init(struct omap_target_agent_s *ta, int chnum,
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}
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omap_mcspi_reset(s);
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iomemtype = l4_register_io_memory(omap_mcspi_readfn,
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omap_mcspi_writefn, s);
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iomemtype = cpu_register_io_memory(omap_mcspi_readfn,
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omap_mcspi_writefn, s, DEVICE_NATIVE_ENDIAN);
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omap_l4_attach(ta, 0, iomemtype);
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return s;
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@ -89,8 +89,9 @@ struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
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struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
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omap_synctimer_reset(s);
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omap_l4_attach(ta, 0, l4_register_io_memory(
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omap_synctimer_readfn, omap_synctimer_writefn, s));
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omap_l4_attach(ta, 0, cpu_register_io_memory(
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omap_synctimer_readfn, omap_synctimer_writefn, s,
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DEVICE_NATIVE_ENDIAN));
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return s;
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}
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@ -107,6 +107,7 @@ static CPUWriteMemoryFunc * const omap_tap_writefn[] = {
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void omap_tap_init(struct omap_target_agent_s *ta,
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struct omap_mpu_state_s *mpu)
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{
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omap_l4_attach(ta, 0, l4_register_io_memory(
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omap_tap_readfn, omap_tap_writefn, mpu));
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omap_l4_attach(ta, 0, cpu_register_io_memory(
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omap_tap_readfn, omap_tap_writefn, mpu,
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DEVICE_NATIVE_ENDIAN));
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}
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