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target-microblaze: Convert endi to a CPU property 

Originally the endi PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Alistair Francis 2015-06-18 21:16:35 -07:00 committed by Edgar E. Iglesias
parent a6c3ed2474
commit a88bbb006a
4 changed files with 6 additions and 3 deletions
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2
hw/microblaze/petalogix_ml605_mmu.c
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@ -70,7 +70,6 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu)
env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
/* setup pvr to match kernel setting */ /* setup pvr to match kernel setting */
env->pvr.regs[0] |= PVR0_ENDI;
env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8); env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
env->pvr.regs[4] = 0xc56b8000; env->pvr.regs[4] = 0xc56b8000;
env->pvr.regs[5] = 0xc56be000; env->pvr.regs[5] = 0xc56be000;
@ -99,6 +98,7 @@ petalogix_ml605_init(MachineState *machine)
object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort); object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort);
object_property_set_bool(OBJECT(cpu), true, "dcache-writeback", object_property_set_bool(OBJECT(cpu), true, "dcache-writeback",
&error_abort); &error_abort);
object_property_set_bool(OBJECT(cpu), true, "endianness", &error_abort);
object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
/* Attach emulated BRAM through the LMB. */ /* Attach emulated BRAM through the LMB. */

1
target-microblaze/cpu-qom.h
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@ -66,6 +66,7 @@ typedef struct MicroBlazeCPU {
uint8_t use_fpu; uint8_t use_fpu;
bool use_mmu; bool use_mmu;
bool dcache_writeback; bool dcache_writeback;
bool endi;
} cfg; } cfg;
CPUMBState env; CPUMBState env;

4
target-microblaze/cpu.c
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@ -114,7 +114,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) | env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) |
(cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) |
(cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0); (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) |
(cpu->cfg.endi ? PVR0_ENDI_MASK : 0);
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0); (cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0);
@ -174,6 +175,7 @@ static Property mb_properties[] = {
DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true), DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback, DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
false), false),
DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
DEFINE_PROP_END_OF_LIST(), DEFINE_PROP_END_OF_LIST(),
}; };

2
target-microblaze/cpu.h
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@ -124,7 +124,7 @@ typedef struct CPUMBState CPUMBState;
#define PVR0_USE_DCACHE_MASK 0x01000000 #define PVR0_USE_DCACHE_MASK 0x01000000
#define PVR0_USE_MMU_MASK 0x00800000 #define PVR0_USE_MMU_MASK 0x00800000
#define PVR0_USE_BTC 0x00400000 #define PVR0_USE_BTC 0x00400000
#define PVR0_ENDI 0x00200000 #define PVR0_ENDI_MASK 0x00200000
#define PVR0_FAULT 0x00100000 #define PVR0_FAULT 0x00100000
#define PVR0_VERSION_MASK 0x0000FF00 #define PVR0_VERSION_MASK 0x0000FF00
#define PVR0_USER1_MASK 0x000000FF #define PVR0_USER1_MASK 0x000000FF