mirror of https://gitee.com/openkylin/qemu.git
Add xxsldwi
This patch adds the VSX Shift Left Double by Word Immediate (xxsldwi) instruction. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -500,6 +500,7 @@ EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5);
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EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5);
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EXTRACT_HELPER(DM, 8, 2);
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EXTRACT_HELPER(UIM, 16, 2);
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EXTRACT_HELPER(SHW, 8, 2);
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/*****************************************************************************/
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/* PowerPC instructions table */
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@ -7388,6 +7389,66 @@ static void gen_xxspltw(DisasContext *ctx)
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tcg_temp_free(b2);
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}
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static void gen_xxsldwi(DisasContext *ctx)
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{
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TCGv_i64 xth, xtl;
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if (unlikely(!ctx->vsx_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_VSXU);
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return;
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}
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xth = tcg_temp_new();
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xtl = tcg_temp_new();
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switch (SHW(ctx->opcode)) {
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case 0: {
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tcg_gen_mov_i64(xth, cpu_vsrh(xA(ctx->opcode)));
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tcg_gen_mov_i64(xtl, cpu_vsrl(xA(ctx->opcode)));
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break;
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}
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case 1: {
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TCGv_i64 t0 = tcg_temp_new();
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tcg_gen_mov_i64(xth, cpu_vsrh(xA(ctx->opcode)));
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tcg_gen_shli_i64(xth, xth, 32);
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tcg_gen_mov_i64(t0, cpu_vsrl(xA(ctx->opcode)));
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_or_i64(xth, xth, t0);
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tcg_gen_mov_i64(xtl, cpu_vsrl(xA(ctx->opcode)));
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tcg_gen_shli_i64(xtl, xtl, 32);
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tcg_gen_mov_i64(t0, cpu_vsrh(xB(ctx->opcode)));
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_or_i64(xtl, xtl, t0);
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tcg_temp_free(t0);
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break;
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}
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case 2: {
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tcg_gen_mov_i64(xth, cpu_vsrl(xA(ctx->opcode)));
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tcg_gen_mov_i64(xtl, cpu_vsrh(xB(ctx->opcode)));
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break;
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}
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case 3: {
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TCGv_i64 t0 = tcg_temp_new();
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tcg_gen_mov_i64(xth, cpu_vsrl(xA(ctx->opcode)));
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tcg_gen_shli_i64(xth, xth, 32);
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tcg_gen_mov_i64(t0, cpu_vsrh(xB(ctx->opcode)));
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_or_i64(xth, xth, t0);
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tcg_gen_mov_i64(xtl, cpu_vsrh(xB(ctx->opcode)));
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tcg_gen_shli_i64(xtl, xtl, 32);
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tcg_gen_mov_i64(t0, cpu_vsrl(xB(ctx->opcode)));
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tcg_gen_shri_i64(t0, t0, 32);
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tcg_gen_or_i64(xtl, xtl, t0);
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tcg_temp_free(t0);
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break;
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}
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}
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tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xth);
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tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), xtl);
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tcg_temp_free(xth);
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tcg_temp_free(xtl);
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}
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/*** SPE extension ***/
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/* Register moves */
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@ -9903,6 +9964,7 @@ VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX),
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GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX),
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GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),
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GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),
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GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),
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#define GEN_XXSEL_ROW(opc3) \
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GEN_HANDLER2_E(xxsel, "xxsel", 0x3C, 0x18, opc3, 0, PPC_NONE, PPC2_VSX), \
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