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target/arm: fix TCG leak for fcvt half->double 

When support for the AHP flag was added we inexplicably only freed the
new temps in one of the two legs. Move those tcg_temp_free to the same
level as the allocation to fix that leak.

Fixes: 486624fcd3
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200131153439.26027-1-alex.bennee@linaro.org
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Alex Bennée 2020-01-31 15:34:39 +00:00 committed by Peter Maydell
parent adcd6e93b9
commit aeab8e5eb2
1 changed files with 2 additions and 2 deletions
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4
target/arm/translate-a64.c
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@ -5778,8 +5778,6 @@ static void handle_fp_fcvt(DisasContext *s, int opcode,
TCGv_i32 tcg_rd = tcg_temp_new_i32(); TCGv_i32 tcg_rd = tcg_temp_new_i32();
gen_helper_vfp_fcvt_f16_to_f32(tcg_rd, tcg_rn, tcg_fpst, tcg_ahp); gen_helper_vfp_fcvt_f16_to_f32(tcg_rd, tcg_rn, tcg_fpst, tcg_ahp);
write_fp_sreg(s, rd, tcg_rd); write_fp_sreg(s, rd, tcg_rd);
tcg_temp_free_ptr(tcg_fpst);
tcg_temp_free_i32(tcg_ahp);
tcg_temp_free_i32(tcg_rd); tcg_temp_free_i32(tcg_rd);
} else { } else {
/* Half to double */ /* Half to double */
@ -5789,6 +5787,8 @@ static void handle_fp_fcvt(DisasContext *s, int opcode,
tcg_temp_free_i64(tcg_rd); tcg_temp_free_i64(tcg_rd);
} }
tcg_temp_free_i32(tcg_rn); tcg_temp_free_i32(tcg_rn);
tcg_temp_free_ptr(tcg_fpst);
tcg_temp_free_i32(tcg_ahp);
break; break;
} }
default: default: