mirror of https://gitee.com/openkylin/qemu.git
target-mips: replace few LOG_DISAS() with trace points
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
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@ -157,6 +157,7 @@ trace-events-subdirs += audio
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trace-events-subdirs += net
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trace-events-subdirs += target/arm
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trace-events-subdirs += target/i386
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trace-events-subdirs += target/mips
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trace-events-subdirs += target/sparc
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trace-events-subdirs += target/s390x
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trace-events-subdirs += target/ppc
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@ -0,0 +1,5 @@
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# See docs/tracing.txt for syntax documentation.
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# target/mips/translate.c
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mips_translate_c0(const char *instr, const char *rn, int reg, int sel) "%s %s (reg %d sel %d)"
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mips_translate_tr(const char *instr, int rt, int u, int sel, int h) "%s (reg %d u %d sel %d h %d)"
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@ -33,6 +33,7 @@
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#include "sysemu/kvm.h"
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#include "exec/semihost.h"
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#include "target/mips/trace.h"
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#include "trace-tcg.h"
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#include "exec/log.h"
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@ -4866,9 +4867,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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(void)rn; /* avoid a compiler warning */
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LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
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trace_mips_translate_c0("mfhc0", rn, reg, sel);
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return;
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cp0_unimplemented:
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@ -4941,8 +4940,8 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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trace_mips_translate_c0("mthc0", rn, reg, sel);
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(void)rn; /* avoid a compiler warning */
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cp0_unimplemented:
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qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
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}
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@ -5622,8 +5621,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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(void)rn; /* avoid a compiler warning */
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LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
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trace_mips_translate_c0("mfc0", rn, reg, sel);
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return;
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cp0_unimplemented:
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@ -6284,8 +6282,8 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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(void)rn; /* avoid a compiler warning */
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LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
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trace_mips_translate_c0("mtc0", rn, reg, sel);
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/* For simplicity assume that all writes can cause interrupts. */
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if (ctx->tb->cflags & CF_USE_ICOUNT) {
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gen_io_end();
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@ -6923,8 +6921,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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(void)rn; /* avoid a compiler warning */
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LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
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trace_mips_translate_c0("dmfc0", rn, reg, sel);
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return;
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cp0_unimplemented:
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@ -7583,8 +7580,8 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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default:
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goto cp0_unimplemented;
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}
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(void)rn; /* avoid a compiler warning */
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LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
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trace_mips_translate_c0("dmtc0", rn, reg, sel);
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/* For simplicity assume that all writes can cause interrupts. */
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if (ctx->tb->cflags & CF_USE_ICOUNT) {
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gen_io_end();
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@ -7803,7 +7800,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
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default:
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goto die;
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}
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LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h);
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trace_mips_translate_tr("mftr", rt, u, sel, h);
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gen_store_gpr(t0, rd);
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tcg_temp_free(t0);
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return;
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@ -8008,7 +8005,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
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default:
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goto die;
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}
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LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h);
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trace_mips_translate_tr("mttr", rd, u, sel, h);
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tcg_temp_free(t0);
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return;
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