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target/mips: Update gen_flt_ldst() 

Update gen_flt_ldst() in order to reuse the functions for nanoMIPS

Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
This commit is contained in:
Yongbok Kim 2018-06-20 13:05:58 +01:00 committed by Aleksandar Markovic
parent 0305d194be
commit b52d3bfa2d
1 changed files with 7 additions and 8 deletions
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15
target/mips/translate.c
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@ -2433,11 +2433,8 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
/* Load and store */ /* Load and store */
static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft, static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
int base, int16_t offset) TCGv t0)
{ {
TCGv t0 = tcg_temp_new();
gen_base_offset_addr(ctx, t0, base, offset);
/* Don't do NOP if destination is zero: we must perform the actual /* Don't do NOP if destination is zero: we must perform the actual
memory access. */ memory access. */
switch (opc) { switch (opc) {
@ -2480,15 +2477,15 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
default: default:
MIPS_INVAL("flt_ldst"); MIPS_INVAL("flt_ldst");
generate_exception_end(ctx, EXCP_RI); generate_exception_end(ctx, EXCP_RI);
goto out; break;
} }
out:
tcg_temp_free(t0);
} }
static void gen_cop1_ldst(DisasContext *ctx, uint32_t op, int rt, static void gen_cop1_ldst(DisasContext *ctx, uint32_t op, int rt,
int rs, int16_t imm) int rs, int16_t imm)
{ {
TCGv t0 = tcg_temp_new();
if (ctx->CP0_Config1 & (1 << CP0C1_FP)) { if (ctx->CP0_Config1 & (1 << CP0C1_FP)) {
check_cp1_enabled(ctx); check_cp1_enabled(ctx);
switch (op) { switch (op) {
@ -2497,11 +2494,13 @@ static void gen_cop1_ldst(DisasContext *ctx, uint32_t op, int rt,
check_insn(ctx, ISA_MIPS2); check_insn(ctx, ISA_MIPS2);
/* Fallthrough */ /* Fallthrough */
default: default:
gen_flt_ldst(ctx, op, rt, rs, imm); gen_base_offset_addr(ctx, t0, rs, imm);
gen_flt_ldst(ctx, op, rt, t0);
} }
} else { } else {
generate_exception_err(ctx, EXCP_CpU, 1); generate_exception_err(ctx, EXCP_CpU, 1);
} }
tcg_temp_free(t0);
} }
/* Arithmetic with immediate operand */ /* Arithmetic with immediate operand */