mirror of https://gitee.com/openkylin/qemu.git
cirrus hwcursor fixes.
set secondary-vga category. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJUkEU5AAoJEEy22O7T6HE4zzYQAMcwGnfwzLzWRXtSqPAkwJpP 2SWLZfrSJE2x4Jh19sVX1T8vQa2bPm5Rye2C3/LpqsK5lcBozXkzXBxr9b7Ps/lc 1E4SJxekNmKpqSN6xwboXwrXo1du0ekOyOLDlMOTAIcUmUPTTn4qLhlCEdMaXwyB IAU9+3ZkjciPZ4bZLC9nz3kyZrRAXOkQ7XE3QcXIEAIxC6xVtkEu6ktEBiAEE09o +NLIgyZ0dwZeRQCueIhrvpaDfQXAFfR8HbvNNE3QQGZm+4424snt4JNFSOwuQ3Ny 0cVQ02VaAmrUGO3l7GukKZwkXV9JCZBQL0cLUG74bOxQCnt/QAI+MyjZbtjF0FAR YzTgE05yIFRa6KNRujjrfBheq9xfz6BBQQaZPECy6XNd//NDGbm/nqk2JXGHxiYr Z2oSsxhXLVgV2Wznl95OasxrPzgTfSTMSYHsGAZEPCpJhfHIWqGTZnqpVcpyvsU7 yHJtbzbv3n7EpD13LHPXkXBtH/ls23I+OQOfQWOLNDQ3OUOGxCMjuxIQbkNwnjVc RTI/qOKHuGvAIzZgZHNsBS6+5VMu20nhcbo6xT8OxFhEPb+hNfJEgOXppcU2baYA mpYvibnADjiWrR+/8Pf6Zn4PMRe6lV3wWRbBwzyK0DpnTFdQ2d/vqHaCz1f9YHME PsekZP7WAQxSg/pK9d9a =/o3d -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20141216-1' into staging cirrus hwcursor fixes. set secondary-vga category. # gpg: Signature made Tue 16 Dec 2014 14:44:09 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vga-20141216-1: vga: set catagory bit for secondary vga device move hw cursor pos from cirrus to vga cirrus: Force use of shadow pixmap when HW cursor is enabled vga: Add mechanism to force the use of a shadow surface Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
b574f60268
hw/display
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@ -202,8 +202,6 @@ typedef struct CirrusVGAState {
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uint32_t cirrus_bank_base[2];
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uint32_t cirrus_bank_limit[2];
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uint8_t cirrus_hidden_palette[48];
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uint32_t hw_cursor_x;
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uint32_t hw_cursor_y;
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int cirrus_blt_pixelwidth;
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int cirrus_blt_width;
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int cirrus_blt_height;
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@ -1328,7 +1326,7 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
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case 0xd0:
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case 0xf0: // Graphics Cursor X
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s->vga.sr[0x10] = val;
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s->hw_cursor_x = (val << 3) | (s->vga.sr_index >> 5);
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s->vga.hw_cursor_x = (val << 3) | (s->vga.sr_index >> 5);
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break;
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case 0x11:
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case 0x31:
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@ -1339,7 +1337,7 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
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case 0xd1:
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case 0xf1: // Graphics Cursor Y
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s->vga.sr[0x11] = val;
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s->hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5);
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s->vga.hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5);
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break;
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case 0x07: // Extended Sequencer Mode
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cirrus_update_memory_access(s);
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@ -1351,7 +1349,6 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
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case 0x0d: // VCLK 2
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case 0x0e: // VCLK 3
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case 0x0f: // DRAM Control
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case 0x12: // Graphics Cursor Attribute
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case 0x13: // Graphics Cursor Pattern Address
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case 0x14: // Scratch Register 2
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case 0x15: // Scratch Register 3
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@ -1370,6 +1367,14 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
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s->vga.sr_index, val);
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#endif
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break;
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case 0x12: // Graphics Cursor Attribute
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s->vga.sr[0x12] = val;
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s->vga.force_shadow = !!(val & CIRRUS_CURSOR_SHOW);
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#ifdef DEBUG_CIRRUS
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printf("cirrus: cursor ctl SR12=%02x (force shadow: %d)\n",
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val, s->vga.force_shadow);
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#endif
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break;
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case 0x17: // Configuration Readback and Extended Control
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s->vga.sr[s->vga.sr_index] = (s->vga.sr[s->vga.sr_index] & 0x38)
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| (val & 0xc7);
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@ -2188,14 +2193,14 @@ static void cirrus_cursor_invalidate(VGACommonState *s1)
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}
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/* invalidate last cursor and new cursor if any change */
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if (s->last_hw_cursor_size != size ||
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s->last_hw_cursor_x != s->hw_cursor_x ||
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s->last_hw_cursor_y != s->hw_cursor_y) {
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s->last_hw_cursor_x != s->vga.hw_cursor_x ||
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s->last_hw_cursor_y != s->vga.hw_cursor_y) {
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invalidate_cursor1(s);
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s->last_hw_cursor_size = size;
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s->last_hw_cursor_x = s->hw_cursor_x;
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s->last_hw_cursor_y = s->hw_cursor_y;
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s->last_hw_cursor_x = s->vga.hw_cursor_x;
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s->last_hw_cursor_y = s->vga.hw_cursor_y;
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/* compute the real cursor min and max y */
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cirrus_cursor_compute_yrange(s);
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invalidate_cursor1(s);
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@ -2252,14 +2257,15 @@ static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
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} else {
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h = 32;
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}
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if (scr_y < s->hw_cursor_y ||
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scr_y >= (s->hw_cursor_y + h))
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if (scr_y < s->vga.hw_cursor_y ||
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scr_y >= (s->vga.hw_cursor_y + h)) {
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return;
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}
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src = s->vga.vram_ptr + s->real_vram_size - 16 * 1024;
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if (s->vga.sr[0x12] & CIRRUS_CURSOR_LARGE) {
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src += (s->vga.sr[0x13] & 0x3c) * 256;
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src += (scr_y - s->hw_cursor_y) * 16;
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src += (scr_y - s->vga.hw_cursor_y) * 16;
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poffset = 8;
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content = ((uint32_t *)src)[0] |
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((uint32_t *)src)[1] |
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@ -2267,7 +2273,7 @@ static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
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((uint32_t *)src)[3];
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} else {
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src += (s->vga.sr[0x13] & 0x3f) * 256;
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src += (scr_y - s->hw_cursor_y) * 4;
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src += (scr_y - s->vga.hw_cursor_y) * 4;
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poffset = 128;
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@ -2279,10 +2285,10 @@ static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
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return;
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w = h;
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x1 = s->hw_cursor_x;
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x1 = s->vga.hw_cursor_x;
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if (x1 >= s->vga.last_scr_width)
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return;
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x2 = s->hw_cursor_x + w;
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x2 = s->vga.hw_cursor_x + w;
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if (x2 > s->vga.last_scr_width)
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x2 = s->vga.last_scr_width;
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w = x2 - x1;
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@ -2771,8 +2777,8 @@ static const VMStateDescription vmstate_cirrus_vga = {
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VMSTATE_INT32(vga.bank_offset, CirrusVGAState),
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VMSTATE_UINT8(cirrus_hidden_dac_lockindex, CirrusVGAState),
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VMSTATE_UINT8(cirrus_hidden_dac_data, CirrusVGAState),
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VMSTATE_UINT32(hw_cursor_x, CirrusVGAState),
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VMSTATE_UINT32(hw_cursor_y, CirrusVGAState),
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VMSTATE_UINT32(vga.hw_cursor_x, CirrusVGAState),
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VMSTATE_UINT32(vga.hw_cursor_y, CirrusVGAState),
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/* XXX: we do not save the bitblt state - we assume we do not save
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the state when the blitter is active */
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VMSTATE_END_OF_LIST()
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@ -321,6 +321,7 @@ static void secondary_class_init(ObjectClass *klass, void *data)
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dc->vmsd = &vmstate_vga_pci;
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dc->props = secondary_pci_properties;
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dc->reset = pci_secondary_vga_reset;
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set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
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}
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static const TypeInfo vga_info = {
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@ -1436,6 +1436,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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uint8_t *d;
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uint32_t v, addr1, addr;
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vga_draw_line_func *vga_draw_line = NULL;
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bool share_surface;
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#ifdef HOST_WORDS_BIGENDIAN
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bool byteswap = !s->big_endian_fb;
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#else
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@ -1479,21 +1480,33 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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}
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depth = s->get_bpp(s);
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share_surface = (!s->force_shadow) &&
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( depth == 32 || (depth == 16 && !byteswap) );
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if (s->line_offset != s->last_line_offset ||
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disp_width != s->last_width ||
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height != s->last_height ||
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s->last_depth != depth ||
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s->last_byteswap != byteswap) {
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if (depth == 32 || (depth == 16 && !byteswap)) {
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s->last_byteswap != byteswap ||
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share_surface != is_buffer_shared(surface)) {
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if (share_surface) {
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pixman_format_code_t format =
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qemu_default_pixman_format(depth, !byteswap);
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surface = qemu_create_displaysurface_from(disp_width,
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height, format, s->line_offset,
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s->vram_ptr + (s->start_addr * 4));
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dpy_gfx_replace_surface(s->con, surface);
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#ifdef DEBUG_VGA
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printf("VGA: Using shared surface for depth=%d swap=%d\n",
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depth, byteswap);
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#endif
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} else {
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qemu_console_resize(s->con, disp_width, height);
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surface = qemu_console_surface(s->con);
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#ifdef DEBUG_VGA
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printf("VGA: Using shadow surface for depth=%d swap=%d\n",
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depth, byteswap);
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#endif
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}
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s->last_scr_width = disp_width;
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s->last_scr_height = height;
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@ -151,6 +151,7 @@ typedef struct VGACommonState {
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uint32_t last_scr_width, last_scr_height; /* in pixels */
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uint32_t last_depth; /* in bits */
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bool last_byteswap;
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bool force_shadow;
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uint8_t cursor_start, cursor_end;
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bool cursor_visible_phase;
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int64_t cursor_blink_time;
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@ -162,6 +163,8 @@ typedef struct VGACommonState {
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bool default_endian_fb;
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/* hardware mouse cursor support */
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uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
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uint32_t hw_cursor_x;
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uint32_t hw_cursor_y;
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void (*cursor_invalidate)(struct VGACommonState *s);
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void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
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/* tell for each page if it has been updated since the last time */
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