mirror of https://gitee.com/openkylin/qemu.git
Kill off cpu_state_reset()
In commit 1bba0dc932
cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris)
Acked-by: Alexander Graf <agraf@suse.de> (for ppc)
Acked-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
parent
ff18b7625f
commit
b7e516ce04
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@ -443,7 +443,6 @@ void cpu_watchpoint_remove_all(CPUArchState *env, int mask);
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#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
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void cpu_single_step(CPUArchState *env, int enabled);
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void cpu_state_reset(CPUArchState *s);
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int cpu_is_stopped(CPUArchState *env);
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void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
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@ -4,11 +4,6 @@
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#include "host-utils.h"
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#include "sysemu.h"
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void cpu_state_reset(CPUARMState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
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{
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int nregs;
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@ -3576,11 +3576,6 @@ CRISCPU *cpu_cris_init(const char *cpu_model)
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return cpu;
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}
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void cpu_state_reset(CPUCRISState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
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{
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env->pc = gen_opc_pc[pc_pos];
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@ -26,12 +26,6 @@
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//#define DEBUG_MMU
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/* NOTE: must be called outside the CPU execute loop */
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void cpu_state_reset(CPUX86State *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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static void cpu_x86_version(CPUX86State *env, int *family, int *model)
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{
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int cpuver = env->cpuid_version;
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@ -233,9 +233,3 @@ void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value)
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env->flags &= ~LM32_FLAG_IGNORE_MSB;
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}
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}
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void cpu_state_reset(CPULM32State *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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@ -98,11 +98,6 @@ static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
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return 0;
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}
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void cpu_state_reset(CPUM68KState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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CPUM68KState *cpu_m68k_init(const char *cpu_model)
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{
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M68kCPU *cpu;
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@ -2001,11 +2001,6 @@ MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
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return cpu;
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}
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void cpu_state_reset(CPUMBState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, int pc_pos)
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{
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env->sregs[SR_PC] = gen_opc_pc[pc_pos];
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@ -637,6 +637,9 @@ static inline CPUMIPSState *cpu_init(const char *cpu_model)
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return &cpu->env;
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}
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/* TODO QOM'ify CPU reset and remove */
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void cpu_state_reset(CPUMIPSState *s);
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/* mips_timer.c */
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uint32_t cpu_mips_get_random (CPUMIPSState *env);
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uint32_t cpu_mips_get_count (CPUMIPSState *env);
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@ -3186,11 +3186,6 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr)
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TARGET_FMT_lx "\n", RA, msr);
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}
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void cpu_state_reset(CPUPPCState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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PowerPCCPU *cpu_ppc_init(const char *cpu_model)
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{
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PowerPCCPU *cpu;
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@ -106,14 +106,7 @@ int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw
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return 1;
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}
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#endif /* CONFIG_USER_ONLY */
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void cpu_state_reset(CPUS390XState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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#ifndef CONFIG_USER_ONLY
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#else /* !CONFIG_USER_ONLY */
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/* Ensure to exit the TB after this call! */
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static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilc)
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@ -178,11 +178,6 @@ void cpu_dump_state(CPUSH4State * env, FILE * f,
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}
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}
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void cpu_state_reset(CPUSH4State *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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typedef struct {
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const char *name;
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int id;
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@ -23,11 +23,6 @@
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static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
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void cpu_state_reset(CPUSPARCState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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/* CPUClass::reset() */
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static void sparc_cpu_reset(CPUState *s)
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{
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@ -33,11 +33,6 @@
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#include "hw/loader.h"
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#endif
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void cpu_state_reset(CPUXtensaState *env)
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{
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cpu_reset(ENV_GET_CPU(env));
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}
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static struct XtensaConfigList *xtensa_cores;
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void xtensa_register_core(XtensaConfigList *node)
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