mirror of https://gitee.com/openkylin/qemu.git
target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180119045438.28582-15-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -11688,34 +11688,36 @@ static inline int fp_exception_el(CPUARMState *env)
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}
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void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
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target_ulong *cs_base, uint32_t *flags)
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target_ulong *cs_base, uint32_t *pflags)
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{
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ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
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uint32_t flags;
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if (is_a64(env)) {
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*pc = env->pc;
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*flags = ARM_TBFLAG_AARCH64_STATE_MASK;
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flags = ARM_TBFLAG_AARCH64_STATE_MASK;
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/* Get control bits for tagged addresses */
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*flags |= (arm_regime_tbi0(env, mmu_idx) << ARM_TBFLAG_TBI0_SHIFT);
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*flags |= (arm_regime_tbi1(env, mmu_idx) << ARM_TBFLAG_TBI1_SHIFT);
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flags |= (arm_regime_tbi0(env, mmu_idx) << ARM_TBFLAG_TBI0_SHIFT);
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flags |= (arm_regime_tbi1(env, mmu_idx) << ARM_TBFLAG_TBI1_SHIFT);
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} else {
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*pc = env->regs[15];
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*flags = (env->thumb << ARM_TBFLAG_THUMB_SHIFT)
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flags = (env->thumb << ARM_TBFLAG_THUMB_SHIFT)
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| (env->vfp.vec_len << ARM_TBFLAG_VECLEN_SHIFT)
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| (env->vfp.vec_stride << ARM_TBFLAG_VECSTRIDE_SHIFT)
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| (env->condexec_bits << ARM_TBFLAG_CONDEXEC_SHIFT)
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| (arm_sctlr_b(env) << ARM_TBFLAG_SCTLR_B_SHIFT);
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if (!(access_secure_reg(env))) {
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*flags |= ARM_TBFLAG_NS_MASK;
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flags |= ARM_TBFLAG_NS_MASK;
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}
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if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
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|| arm_el_is_aa64(env, 1)) {
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*flags |= ARM_TBFLAG_VFPEN_MASK;
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flags |= ARM_TBFLAG_VFPEN_MASK;
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}
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*flags |= (extract32(env->cp15.c15_cpar, 0, 2)
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<< ARM_TBFLAG_XSCALE_CPAR_SHIFT);
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flags |= (extract32(env->cp15.c15_cpar, 0, 2)
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<< ARM_TBFLAG_XSCALE_CPAR_SHIFT);
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}
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*flags |= (arm_to_core_mmu_idx(mmu_idx) << ARM_TBFLAG_MMUIDX_SHIFT);
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flags |= (arm_to_core_mmu_idx(mmu_idx) << ARM_TBFLAG_MMUIDX_SHIFT);
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/* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
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* states defined in the ARM ARM for software singlestep:
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@ -11725,25 +11727,26 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
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* 1 1 Active-not-pending
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*/
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if (arm_singlestep_active(env)) {
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*flags |= ARM_TBFLAG_SS_ACTIVE_MASK;
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flags |= ARM_TBFLAG_SS_ACTIVE_MASK;
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if (is_a64(env)) {
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if (env->pstate & PSTATE_SS) {
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*flags |= ARM_TBFLAG_PSTATE_SS_MASK;
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flags |= ARM_TBFLAG_PSTATE_SS_MASK;
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}
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} else {
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if (env->uncached_cpsr & PSTATE_SS) {
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*flags |= ARM_TBFLAG_PSTATE_SS_MASK;
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flags |= ARM_TBFLAG_PSTATE_SS_MASK;
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}
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}
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}
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if (arm_cpu_data_is_big_endian(env)) {
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*flags |= ARM_TBFLAG_BE_DATA_MASK;
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flags |= ARM_TBFLAG_BE_DATA_MASK;
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}
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*flags |= fp_exception_el(env) << ARM_TBFLAG_FPEXC_EL_SHIFT;
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flags |= fp_exception_el(env) << ARM_TBFLAG_FPEXC_EL_SHIFT;
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if (arm_v7m_is_handler_mode(env)) {
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*flags |= ARM_TBFLAG_HANDLER_MASK;
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flags |= ARM_TBFLAG_HANDLER_MASK;
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}
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*pflags = flags;
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*cs_base = 0;
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}
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