FPU fixes

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2008-05-12 20:30:28 +00:00
parent 19e6c4b8bc
commit ba7cd150ff
1 changed files with 11 additions and 11 deletions

View File

@ -4535,12 +4535,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
switch(op >> 4) { switch(op >> 4) {
case 0: case 0:
gen_op_ld_T0_A0(OT_LONG); gen_op_ld_T0_A0(OT_LONG + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_flds_FT0, cpu_tmp2); tcg_gen_helper_0_1(helper_flds_FT0, cpu_tmp2);
break; break;
case 1: case 1:
gen_op_ld_T0_A0(OT_LONG); gen_op_ld_T0_A0(OT_LONG + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2); tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2);
break; break;
@ -4551,7 +4551,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
break; break;
case 3: case 3:
default: default:
gen_op_ld_T0_A0(OT_WORD); gen_op_lds_T0_A0(OT_WORD + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2); tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2);
break; break;
@ -4574,12 +4574,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
case 0: case 0:
switch(op >> 4) { switch(op >> 4) {
case 0: case 0:
gen_op_ld_T0_A0(OT_LONG); gen_op_ld_T0_A0(OT_LONG + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_flds_ST0, cpu_tmp2); tcg_gen_helper_0_1(helper_flds_ST0, cpu_tmp2);
break; break;
case 1: case 1:
gen_op_ld_T0_A0(OT_LONG); gen_op_ld_T0_A0(OT_LONG + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2); tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2);
break; break;
@ -4590,7 +4590,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
break; break;
case 3: case 3:
default: default:
gen_op_ld_T0_A0(OT_WORD); gen_op_lds_T0_A0(OT_WORD + s->mem_index);
tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]);
tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2); tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2);
break; break;
@ -4602,7 +4602,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
case 1: case 1:
tcg_gen_helper_1_0(helper_fisttl_ST0, cpu_tmp2); tcg_gen_helper_1_0(helper_fisttl_ST0, cpu_tmp2);
tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
gen_op_st_T0_A0(OT_LONG); gen_op_st_T0_A0(OT_LONG + s->mem_index);
break; break;
case 2: case 2:
tcg_gen_helper_1_0(helper_fisttll_ST0, cpu_tmp1); tcg_gen_helper_1_0(helper_fisttll_ST0, cpu_tmp1);
@ -4613,7 +4613,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
default: default:
tcg_gen_helper_1_0(helper_fistt_ST0, cpu_tmp2); tcg_gen_helper_1_0(helper_fistt_ST0, cpu_tmp2);
tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
gen_op_st_T0_A0(OT_WORD); gen_op_st_T0_A0(OT_WORD + s->mem_index);
break; break;
} }
tcg_gen_helper_0_0(helper_fpop); tcg_gen_helper_0_0(helper_fpop);
@ -4623,12 +4623,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
case 0: case 0:
tcg_gen_helper_1_0(helper_fsts_ST0, cpu_tmp2); tcg_gen_helper_1_0(helper_fsts_ST0, cpu_tmp2);
tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
gen_op_st_T0_A0(OT_LONG); gen_op_st_T0_A0(OT_LONG + s->mem_index);
break; break;
case 1: case 1:
tcg_gen_helper_1_0(helper_fistl_ST0, cpu_tmp2); tcg_gen_helper_1_0(helper_fistl_ST0, cpu_tmp2);
tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
gen_op_st_T0_A0(OT_LONG); gen_op_st_T0_A0(OT_LONG + s->mem_index);
break; break;
case 2: case 2:
tcg_gen_helper_1_0(helper_fstl_ST0, cpu_tmp1); tcg_gen_helper_1_0(helper_fstl_ST0, cpu_tmp1);
@ -4639,7 +4639,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
default: default:
tcg_gen_helper_1_0(helper_fist_ST0, cpu_tmp2); tcg_gen_helper_1_0(helper_fist_ST0, cpu_tmp2);
tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2);
gen_op_st_T0_A0(OT_WORD); gen_op_st_T0_A0(OT_WORD + s->mem_index);
break; break;
} }
if ((op & 7) == 3) if ((op & 7) == 3)