From be1b21e885743c08c921846c7201ff59fe82b8b0 Mon Sep 17 00:00:00 2001 From: Kurban Mallachiev Date: Wed, 29 Nov 2017 19:22:19 +0300 Subject: [PATCH] target-ppc: Don't invalidate non-supported msr bits The msr invalidation code (commits 993eb and 2360b) inverts all bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors this leads to incorrect change of excp_prefix in hreg_store_msr() function. The problem is that new msr value get multiplied by msr_mask and inverted msr does not, thus values of MSR_EP bit in new msr value and inverted msr are distinct, so that excp_prefix changes but should not. Signed-off-by: Kurban Mallachiev Signed-off-by: David Gibson --- target/ppc/machine.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 24117e8f31..e475206c6a 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -300,9 +300,9 @@ static int cpu_post_load(void *opaque, int version_id) ppc_store_sdr1(env, env->spr[SPR_SDR1]); } - /* Invalidate all msr bits except MSR_TGPR/MSR_HVB before restoring */ + /* Invalidate all supported msr bits except MSR_TGPR/MSR_HVB before restoring */ msr = env->msr; - env->msr ^= ~((1ULL << MSR_TGPR) | MSR_HVB); + env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); ppc_store_msr(env, msr); hreg_compute_mem_idx(env);