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target/arm: avoid integer overflow in next_page PC check 

If the PC is in the last page of the address space, next_page_start
overflows to 0. Fix it.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Emilio G. Cota 2018-04-10 11:09:52 -04:00 committed by Richard Henderson
parent 56371527f3
commit bfe7ad5be7
2 changed files with 6 additions and 7 deletions
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11
target/arm/translate.c
View File

@ -9930,7 +9930,7 @@ static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn)
return false; return false;
} }
if ((insn >> 11) == 0x1e && (s->pc < s->next_page_start - 3)) { if ((insn >> 11) == 0x1e && s->pc - s->page_start < TARGET_PAGE_SIZE - 3) {
/* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix /* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix
* is not on the next page; we merge this into a 32-bit * is not on the next page; we merge this into a 32-bit
* insn. * insn.
@ -12301,8 +12301,7 @@ static int arm_tr_init_disas_context(DisasContextBase *dcbase,
dc->is_ldex = false; dc->is_ldex = false;
dc->ss_same_el = false; /* Can't be true since EL_d must be AArch64 */ dc->ss_same_el = false; /* Can't be true since EL_d must be AArch64 */
dc->next_page_start = dc->page_start = dc->base.pc_first & TARGET_PAGE_MASK;
(dc->base.pc_first & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
/* If architectural single step active, limit to 1. */ /* If architectural single step active, limit to 1. */
if (is_singlestepping(dc)) { if (is_singlestepping(dc)) {
@ -12312,7 +12311,7 @@ static int arm_tr_init_disas_context(DisasContextBase *dcbase,
/* ARM is a fixed-length ISA. Bound the number of insns to execute /* ARM is a fixed-length ISA. Bound the number of insns to execute
to those left on the page. */ to those left on the page. */
if (!dc->thumb) { if (!dc->thumb) {
int bound = (dc->next_page_start - dc->base.pc_first) / 4; int bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
max_insns = MIN(max_insns, bound); max_insns = MIN(max_insns, bound);
} }
@ -12584,8 +12583,8 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
* but isn't very efficient). * but isn't very efficient).
*/ */
if (dc->base.is_jmp == DISAS_NEXT if (dc->base.is_jmp == DISAS_NEXT
&& (dc->pc >= dc->next_page_start && (dc->pc - dc->page_start >= TARGET_PAGE_SIZE
|| (dc->pc >= dc->next_page_start - 3 || (dc->pc - dc->page_start >= TARGET_PAGE_SIZE - 3
&& insn_crosses_page(env, dc)))) { && insn_crosses_page(env, dc)))) {
dc->base.is_jmp = DISAS_TOO_MANY; dc->base.is_jmp = DISAS_TOO_MANY;
} }

2
target/arm/translate.h
View File

@ -9,7 +9,7 @@ typedef struct DisasContext {
DisasContextBase base; DisasContextBase base;
target_ulong pc; target_ulong pc;
target_ulong next_page_start; target_ulong page_start;
uint32_t insn; uint32_t insn;
/* Nonzero if this instruction has been conditionally skipped. */ /* Nonzero if this instruction has been conditionally skipped. */
int condjmp; int condjmp;