mirror of https://gitee.com/openkylin/qemu.git
PPC: Bamboo: recompile device tree
Recent dtc doesn't compile our dts anymore. Change all hex numbers to have 0x prefixes, indicate the old version and recompile using recent dtc. This doesn't change any semantics in the device tree. Signed-off-by: Alexander Graf <agraf@suse.de>
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Alexander Graf
parent
d49bc1fb3e
commit
c148b2b47a
Binary file not shown.
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@ -9,12 +9,14 @@
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* any warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,bamboo";
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compatible = "amcc,bamboo";
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dcr-parent = <&/cpus/cpu@0>;
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dcr-parent = <&{/cpus/cpu@0}>;
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aliases {
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serial0 = &UART0;
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@ -29,12 +31,12 @@
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device_type = "cpu";
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model = "PowerPC,440EP";
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reg = <0>;
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clock-frequency = <1fca0550>;
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timebase-frequency = <017d7840>;
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i-cache-line-size = <20>;
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d-cache-line-size = <20>;
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i-cache-size = <8000>;
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d-cache-size = <8000>;
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clock-frequency = <0x1fca0550>;
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timebase-frequency = <0x017d7840>;
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i-cache-line-size = <0x20>;
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d-cache-line-size = <0x20>;
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i-cache-size = <0x8000>;
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d-cache-size = <0x8000>;
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dcr-controller;
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dcr-access-method = "native";
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};
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@ -42,40 +44,27 @@
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memory {
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device_type = "memory";
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reg = <0 0 9000000>;
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reg = <0x0 0x0 0x9000000>;
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0c0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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cell-index = <0x0>;
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dcr-reg = <0x0c0 0x009>;
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#address-cells = <0x0>;
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#size-cells = <0x0>;
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#interrupt-cells = <0x2>;
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};
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/*
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0d0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <1e 4 1f 4>;
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interrupt-parent = <&UIC0>;
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};
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*/
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SDR0: sdr {
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compatible = "ibm,sdr-440ep";
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dcr-reg = <00e 002>;
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dcr-reg = <0x00e 0x002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440ep";
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dcr-reg = <00c 002>;
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dcr-reg = <0x00c 0x002>;
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};
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plb {
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@ -83,16 +72,16 @@
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <07f28154>;
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clock-frequency = <0x07f28154>;
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SDRAM0: sdram {
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compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
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dcr-reg = <010 2>;
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dcr-reg = <0x010 0x2>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440ep", "ibm,dma-440gp";
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dcr-reg = <100 027>;
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dcr-reg = <0x100 0x027>;
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};
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POB0: opb {
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@ -102,18 +91,18 @@
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/* Bamboo is oddball in the 44x world and doesn't use the ERPN
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* bits.
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*/
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ranges = <00000000 0 00000000 80000000
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80000000 0 80000000 80000000>;
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ranges = <0x00000000 0x0 0x00000000 0x80000000
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0x80000000 0x0 0x80000000 0x80000000>;
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/* interrupt-parent = <&UIC1>; */
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interrupts = <7 4>;
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clock-frequency = <03f940aa>;
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clock-frequency = <0x03f940aa>;
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EBC0: ebc {
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compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
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dcr-reg = <012 2>;
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dcr-reg = <0x012 2>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <03f940aa>;
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clock-frequency = <0x03f940aa>;
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interrupts = <5 1>;
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/* interrupt-parent = <&UIC1>; */
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};
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@ -121,10 +110,10 @@
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600300 8>;
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virtual-reg = <ef600300>;
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clock-frequency = <00a8c000>;
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current-speed = <1c200>;
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reg = <0xef600300 8>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0x00a8c000>;
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current-speed = <0x1c200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0 4>;
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};
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@ -132,41 +121,18 @@
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600400 8>;
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virtual-reg = <ef600400>;
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clock-frequency = <00a8c000>;
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reg = <0xef600400 8>;
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virtual-reg = <0xef600400>;
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clock-frequency = <0x00a8c000>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <1 4>;
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};
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/*
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600500 8>;
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virtual-reg = <ef600500>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <3 4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600600 8>;
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virtual-reg = <ef600600>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <4 4>;
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};
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*/
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IIC0: i2c@ef600700 {
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device_type = "i2c";
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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reg = <ef600700 14>;
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reg = <0xef600700 0x14>;
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interrupt-parent = <&UIC0>;
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interrupts = <2 4>;
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};
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@ -174,7 +140,7 @@
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IIC1: i2c@ef600800 {
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device_type = "i2c";
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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reg = <ef600800 14>;
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reg = <0xef600800 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <7 4>;
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};
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@ -182,7 +148,7 @@
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ZMII0: emac-zmii@ef600d00 {
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device_type = "zmii-interface";
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compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
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reg = <ef600d00 c>;
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reg = <0xef600d00 0xc>;
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};
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};
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@ -194,35 +160,35 @@
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#address-cells = <3>;
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compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
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primary;
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reg = <0 eec00000 8 /* Config space access */
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0 eed00000 4 /* IACK */
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0 eed00000 4 /* Special cycle */
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0 ef400000 40>; /* Internal registers */
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reg = <0 0xeec00000 8 /* Config space access */
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0 0xeed00000 4 /* IACK */
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0 0xeed00000 4 /* Special cycle */
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0 0xef400000 0x40>; /* Internal registers */
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed. Chip supports a second
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* IO range but we don't use it for now
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*/
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ranges = <02000000 0 a0000000 0 a0000000 0 20000000
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01000000 0 00000000 0 e8000000 0 00010000>;
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ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
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0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <42000000 0 0 0 0 0 80000000>;
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dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
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/* Bamboo has all 4 IRQ pins tied together per slot */
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interrupt-map-mask = <f800 0 0 0>;
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interrupt-map-mask = <0xf800 0 0 0>;
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interrupt-map = <
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/* IDSEL 1 */
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0800 0 0 0 &UIC0 1c 8
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0x0800 0 0 0 &UIC0 0x1c 8
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/* IDSEL 2 */
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1000 0 0 0 &UIC0 1b 8
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0x1000 0 0 0 &UIC0 0x1b 8
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/* IDSEL 3 */
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1800 0 0 0 &UIC0 1a 8
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0x1800 0 0 0 &UIC0 0x1a 8
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/* IDSEL 4 */
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2000 0 0 0 &UIC0 19 8
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0x2000 0 0 0 &UIC0 0x19 8
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>;
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};
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