mirror of https://gitee.com/openkylin/qemu.git
ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models
The power7_set_irq() and power9_set_irq() functions set this but it is never used actually. Modern Book3s compatible CPUs are only supported by the pnv and spapr machines. They have an interrupt controller, XICS for POWER7/8 and XIVE for POWER9, whose models don't require to track IRQ input states at the CPU level. Drop these lines to avoid confusion. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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c1ad0b892c
16
hw/ppc/ppc.c
16
hw/ppc/ppc.c
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@ -275,10 +275,9 @@ void ppc970_irq_init(PowerPCCPU *cpu)
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static void power7_set_irq(void *opaque, int pin, int level)
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{
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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env, pin, level);
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&cpu->env, pin, level);
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switch (pin) {
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case POWER7_INPUT_INT:
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@ -292,11 +291,6 @@ static void power7_set_irq(void *opaque, int pin, int level)
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LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
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return;
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}
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if (level) {
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env->irq_input_state |= 1 << pin;
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} else {
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env->irq_input_state &= ~(1 << pin);
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}
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}
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void ppcPOWER7_irq_init(PowerPCCPU *cpu)
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@ -311,10 +305,9 @@ void ppcPOWER7_irq_init(PowerPCCPU *cpu)
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static void power9_set_irq(void *opaque, int pin, int level)
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{
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
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env, pin, level);
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&cpu->env, pin, level);
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switch (pin) {
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case POWER9_INPUT_INT:
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@ -334,11 +327,6 @@ static void power9_set_irq(void *opaque, int pin, int level)
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LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
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return;
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}
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if (level) {
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env->irq_input_state |= 1 << pin;
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} else {
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env->irq_input_state &= ~(1 << pin);
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}
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}
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void ppcPOWER9_irq_init(PowerPCCPU *cpu)
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@ -1090,7 +1090,9 @@ struct CPUPPCState {
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#if !defined(CONFIG_USER_ONLY)
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/*
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* This is the IRQ controller, which is implementation dependent
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* and only relevant when emulating a complete machine.
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* and only relevant when emulating a complete machine. Note that
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* this isn't used by recent Book3s compatible CPUs (POWER7 and
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* newer).
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*/
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uint32_t irq_input_state;
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void **irq_inputs;
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