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vmstate, memory: decouple vmstate from memory API 

Currently creating a memory region automatically registers it for
live migration.  This differs from other state (which is enumerated
in a VMStateDescription structure) and ties the live migration code
into the memory core.

Decouple the two by introducing a separate API, vmstate_register_ram(),
for registering a RAM block for migration.  Currently the same
implementation is reused, but later it can be moved into a separate list,
and registrations can be moved to VMStateDescription blocks.

Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-12-20 15:59:12 +02:00
parent 8991c79b57
commit c5705a7728
71 changed files with 286 additions and 154 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile.objs
View File

@ -109,7 +109,7 @@ common-obj-$(CONFIG_SD) += sd.o
common-obj-y += bt.o bt-host.o bt-vhci.o bt-l2cap.o bt-sdp.o bt-hci.o bt-hid.o usb-bt.o
common-obj-y += bt-hci-csr.o
common-obj-y += buffered_file.o migration.o migration-tcp.o
common-obj-y += qemu-char.o savevm.o #aio.o
common-obj-y += qemu-char.o #aio.o
common-obj-y += msmouse.o ps2.o
common-obj-y += qdev.o qdev-properties.o
common-obj-y += block-migration.o iohandler.o

2
Makefile.target
View File

@ -196,7 +196,7 @@ obj-$(CONFIG_VHOST_NET) += vhost.o
obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/virtio-9p-device.o
obj-$(CONFIG_KVM) += kvm.o kvm-all.o
obj-$(CONFIG_NO_KVM) += kvm-stub.o
obj-y += memory.o
obj-y += memory.o savevm.o
LIBS+=-lz
QEMU_CFLAGS += $(VNC_TLS_CFLAGS)

1
cpu-common.h
View File

@ -49,6 +49,7 @@ void qemu_put_ram_ptr(void *addr);
/* This should not be used by devices. */
int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
int len, int is_write);

6
exec-obsolete.h
View File

@ -25,11 +25,9 @@
#ifndef CONFIG_USER_ONLY
ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
ram_addr_t size, void *host,
ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
MemoryRegion *mr);
ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size,
MemoryRegion *mr);
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr);
void qemu_ram_free(ram_addr_t addr);
void qemu_ram_free_from_ptr(ram_addr_t addr);

31
exec.c
View File

@ -2753,14 +2753,19 @@ static ram_addr_t last_ram_offset(void)
return last;
}
ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
ram_addr_t size, void *host,
MemoryRegion *mr)
void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev)
{
RAMBlock *new_block, *block;
size = TARGET_PAGE_ALIGN(size);
new_block = g_malloc0(sizeof(*new_block));
new_block = NULL;
QLIST_FOREACH(block, &ram_list.blocks, next) {
if (block->offset == addr) {
new_block = block;
break;
}
}
assert(new_block);
assert(!new_block->idstr[0]);
if (dev && dev->parent_bus && dev->parent_bus->info->get_dev_path) {
char *id = dev->parent_bus->info->get_dev_path(dev);
@ -2772,12 +2777,21 @@ ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
pstrcat(new_block->idstr, sizeof(new_block->idstr), name);
QLIST_FOREACH(block, &ram_list.blocks, next) {
if (!strcmp(block->idstr, new_block->idstr)) {
if (block != new_block && !strcmp(block->idstr, new_block->idstr)) {
fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n",
new_block->idstr);
abort();
}
}
}
ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
MemoryRegion *mr)
{
RAMBlock *new_block;
size = TARGET_PAGE_ALIGN(size);
new_block = g_malloc0(sizeof(*new_block));
new_block->offset = find_ram_offset(size);
if (host) {
@ -2834,10 +2848,9 @@ ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
return new_block->offset;
}
ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size,
MemoryRegion *mr)
ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr)
{
return qemu_ram_alloc_from_ptr(dev, name, size, NULL, mr);
return qemu_ram_alloc_from_ptr(size, NULL, mr);
}
void qemu_ram_free_from_ptr(ram_addr_t addr)

3
hw/alpha_typhoon.c
View File

@ -726,7 +726,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
but the address space hole reserved at this point is 8TB. */
memory_region_init_ram(&s->ram_region, NULL, "ram", ram_size);
memory_region_init_ram(&s->ram_region, "ram", ram_size);
vmstate_register_ram_global(&s->ram_region);
memory_region_add_subregion(addr_space, 0, &s->ram_region);
/* TIGbus, 0x801.0000.0000, 1GB. */

6
hw/an5206.c
View File

@ -46,11 +46,13 @@ static void an5206_init(ram_addr_t ram_size,
env->rambar0 = AN5206_RAMBAR_ADDR | 1;
/* DRAM at address zero */
memory_region_init_ram(ram, NULL, "an5206.ram", ram_size);
memory_region_init_ram(ram, "an5206.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "an5206.sram", 512);
memory_region_init_ram(sram, "an5206.sram", 512);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env);

9
hw/armv7m.c
View File

@ -198,10 +198,12 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
#endif
/* Flash programming is done via the SCU, so pretend it is ROM. */
memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size);
memory_region_init_ram(flash, "armv7m.flash", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, 0, flash);
memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size);
memory_region_init_ram(sram, "armv7m.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x20000000, sram);
armv7m_bitband_init();
@ -235,7 +237,8 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
/* Hack to map an additional page of ram at the top of the address
space. This stops qemu complaining about executing code outside RAM
when returning from an exception. */
memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000);
memory_region_init_ram(hack, "armv7m.hack", 0x1000);
vmstate_register_ram_global(hack);
memory_region_add_subregion(address_space_mem, 0xfffff000, hack);
qemu_register_reset(armv7m_reset, env);

6
hw/axis_dev88.c
View File

@ -266,12 +266,14 @@ void axisdev88_init (ram_addr_t ram_size,
env = cpu_init(cpu_model);
/* allocate RAM */
memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size);
memory_region_init_ram(phys_ram, "axisdev88.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
internal memory. */
memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE);
memory_region_init_ram(phys_intmem, "axisdev88.chipram", INTMEM_SIZE);
vmstate_register_ram_global(phys_intmem);
memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem);
/* Attach a NAND flash to CS1. */

3
hw/dummy_m68k.c
View File

@ -40,7 +40,8 @@ static void dummy_m68k_init(ram_addr_t ram_size,
env->vbr = 0;
/* RAM at address zero */
memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size);
memory_region_init_ram(ram, "dummy_m68k.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Load kernel. */

3
hw/g364fb.c
View File

@ -524,8 +524,9 @@ static void g364fb_init(DeviceState *dev, G364State *s)
g364fb_screen_dump, NULL, s);
memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
memory_region_init_ram_ptr(&s->mem_vram, dev, "vram",
memory_region_init_ram_ptr(&s->mem_vram, "vram",
s->vram_size, s->vram);
vmstate_register_ram(&s->mem_vram, dev);
memory_region_set_coalescing(&s->mem_vram);
}

5
hw/hw.h
View File

@ -949,4 +949,9 @@ int vmstate_register_with_alias_id(DeviceState *dev, int instance_id,
int required_for_version);
void vmstate_unregister(DeviceState *dev, const VMStateDescription *vmsd,
void *opaque);
struct MemoryRegion;
void vmstate_register_ram(struct MemoryRegion *memory, DeviceState *dev);
void vmstate_unregister_ram(struct MemoryRegion *memory, DeviceState *dev);
void vmstate_register_ram_global(struct MemoryRegion *memory);
#endif

6
hw/integratorcp.c
View File

@ -261,7 +261,8 @@ static int integratorcm_init(SysBusDevice *dev)
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000);
memory_region_init_ram(&s->flash, "integrator.flash", 0x100000);
vmstate_register_ram_global(&s->flash);
s->flash_mapped = false;
memory_region_init_io(&s->iomem, &integratorcm_ops, s,
@ -471,7 +472,8 @@ static void integratorcp_init(ram_addr_t ram_size,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
memory_region_init_ram(ram, NULL, "integrator.ram", ram_size);
memory_region_init_ram(ram, "integrator.ram", ram_size);
vmstate_register_ram_global(ram);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/

7
hw/ivshmem.c
View File

@ -335,8 +335,9 @@ static void create_shared_memory_BAR(IVShmemState *s, int fd) {
ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
memory_region_init_ram_ptr(&s->ivshmem, &s->dev.qdev, "ivshmem.bar2",
memory_region_init_ram_ptr(&s->ivshmem, "ivshmem.bar2",
s->ivshmem_size, ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
/* region for shared memory */
@ -451,8 +452,9 @@ static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
/* mmap the region and map into the BAR2 */
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
incoming_fd, 0);
memory_region_init_ram_ptr(&s->ivshmem, &s->dev.qdev,
memory_region_init_ram_ptr(&s->ivshmem,
"ivshmem.bar2", s->ivshmem_size, map_ptr);
vmstate_register_ram(&s->ivshmem, &s->dev.qdev);
IVSHMEM_DPRINTF("guest h/w addr = %" PRIu64 ", size = %" PRIu64 "\n",
s->ivshmem_offset, s->ivshmem_size);
@ -753,6 +755,7 @@ static int pci_ivshmem_uninit(PCIDevice *dev)
memory_region_destroy(&s->ivshmem_mmio);
memory_region_del_subregion(&s->bar, &s->ivshmem);
vmstate_unregister_ram(&s->ivshmem, &s->dev.qdev);
memory_region_destroy(&s->ivshmem);
memory_region_destroy(&s->bar);
unregister_savevm(&dev->qdev, "ivshmem", s);

6
hw/leon3.c
View File

@ -142,12 +142,14 @@ static void leon3_generic_hw_init(ram_addr_t ram_size,
exit(1);
}
memory_region_init_ram(ram, NULL, "leon3.ram", ram_size);
memory_region_init_ram(ram, "leon3.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Allocate BIOS */
prom_size = 8 * 1024 * 1024; /* 8Mb */
memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size);
memory_region_init_ram(prom, "Leon3.bios", prom_size);
vmstate_register_ram_global(prom);
memory_region_set_readonly(prom, true);
memory_region_add_subregion(address_space_mem, 0x00000000, prom);

6
hw/lm32_boards.c
View File

@ -106,7 +106,8 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used,
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size);
memory_region_init_ram(phys_ram, "lm32_evr.sdram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
@ -200,7 +201,8 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
reset_info->flash_base = flash_base;
memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size);
memory_region_init_ram(phys_ram, "lm32_uclinux.sdram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);

3
hw/mainstone.c
View File

@ -111,7 +111,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
/* Setup CPU & memory */
cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_init_ram(rom, "mainstone.rom", MAINSTONE_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

6
hw/mcf5208.c
View File

@ -213,11 +213,13 @@ static void mcf5208evb_init(ram_addr_t ram_size,
/* TODO: Configure BARs. */
/* DRAM at 0x40000000 */
memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size);
memory_region_init_ram(ram, "mcf5208.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
/* Internal SRAM. */
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384);
memory_region_init_ram(sram, "mcf5208.sram", 16384);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
/* Internal peripherals. */

3
hw/milkymist-minimac2.c
View File

@ -468,8 +468,9 @@ static int milkymist_minimac2_init(SysBusDevice *dev)
sysbus_init_mmio(dev, &s->regs_region);
/* register buffers memory */
memory_region_init_ram(&s->buffers, NULL, "milkymist-minimac2.buffers",
memory_region_init_ram(&s->buffers, "milkymist-minimac2.buffers",
buffers_size);
vmstate_register_ram_global(&s->buffers);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE;
s->tx_buf = s->rx1_buf + MINIMAC2_BUFFER_SIZE;

6
hw/milkymist-softusb.c
View File

@ -267,11 +267,13 @@ static int milkymist_softusb_init(SysBusDevice *dev)
sysbus_init_mmio(dev, &s->regs_region);
/* register pmem and dmem */
memory_region_init_ram(&s->pmem, NULL, "milkymist-softusb.pmem",
memory_region_init_ram(&s->pmem, "milkymist-softusb.pmem",
s->pmem_size);
vmstate_register_ram_global(&s->pmem);
sysbus_add_memory(dev, s->pmem_base, &s->pmem);
memory_region_init_ram(&s->dmem, NULL, "milkymist-softusb.dmem",
memory_region_init_ram(&s->dmem, "milkymist-softusb.dmem",
s->dmem_size);
vmstate_register_ram_global(&s->dmem);
sysbus_add_memory(dev, s->dmem_base, &s->dmem);
hid_init(&s->hid_kbd, HID_KEYBOARD, softusb_kbd_hid_datain);

3
hw/milkymist.c
View File

@ -110,7 +110,8 @@ milkymist_init(ram_addr_t ram_size_not_used,
cpu_lm32_set_phys_msb_ignore(env, 1);
memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size);
memory_region_init_ram(phys_sdram, "milkymist.sdram", sdram_size);
vmstate_register_ram_global(phys_sdram);
memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram);
dinfo = drive_get(IF_PFLASH, 0, 0);

6
hw/mips_fulong2e.c
View File

@ -291,8 +291,10 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
bios_size = 1024 * 1024;
/* allocate RAM */
memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size);
memory_region_init_ram(ram, "fulong2e.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, "fulong2e.bios", bios_size);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(address_space_mem, 0, ram);

9
hw/mips_jazz.c
View File

@ -146,10 +146,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
memory_region_init_ram(ram, "mips_jazz.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, 0, ram);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
memory_region_init_ram(bios, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_init_alias(bios2, "mips_jazz.bios", bios,
0, MAGNUM_BIOS_SIZE);
@ -208,7 +210,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
{
/* Simple ROM, so user doesn't have to provide one */
MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
memory_region_init_ram(rom_mr, "g364fb.rom", 0x80000);
vmstate_register_ram_global(rom_mr);
memory_region_set_readonly(rom_mr, true);
uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
memory_region_add_subregion(address_space, 0x60000000, rom_mr);

9
hw/mips_malta.c
View File

@ -826,7 +826,8 @@ void mips_malta_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
memory_region_init_ram(ram, "mips_malta.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
#ifdef TARGET_WORDS_BIGENDIAN
@ -841,7 +842,8 @@ void mips_malta_init (ram_addr_t ram_size,
if (kernel_filename) {
/* Write a small bootloader to the flash location. */
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE);
memory_region_init_ram(bios, "mips_malta.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE);
/* Map the bios at two physical locations, as on the real board. */
@ -878,7 +880,8 @@ void mips_malta_init (ram_addr_t ram_size,
fl_idx++;
} else {
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE);
memory_region_init_ram(bios, "mips_malta.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_init_alias(bios_alias, "bios.1fc",
bios, 0, BIOS_SIZE);

6
hw/mips_mipssim.c
View File

@ -163,8 +163,10 @@ mips_mipssim_init (ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
memory_region_init_ram(ram, "mips_mipssim.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_init_ram(bios, "mips_mipssim.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(address_space_mem, 0, ram);

6
hw/mips_r4k.c
View File

@ -195,7 +195,8 @@ void mips_r4k_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
memory_region_init_ram(ram, "mips_r4k.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
@ -221,7 +222,8 @@ void mips_r4k_init (ram_addr_t ram_size,
#endif
if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
memory_region_init_ram(bios, "mips_r4k.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);

6
hw/musicpal.c
View File

@ -1472,10 +1472,12 @@ static void musicpal_init(ram_addr_t ram_size,
cpu_pic = arm_pic_init_cpu(env);
/* For now we use a fixed - the original - RAM size */
memory_region_init_ram(ram, NULL, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
memory_region_init_ram(ram, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE);
memory_region_init_ram(sram, "musicpal.sram", MP_SRAM_SIZE);
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);
dev = sysbus_create_simple("mv88w8618_pic", MP_PIC_BASE,

6
hw/omap1.c
View File

@ -3819,9 +3819,11 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size);
memory_region_init_ram(&s->emiff_ram, "omap1.dram", s->sdram_size);
vmstate_register_ram_global(&s->emiff_ram);
memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram);
memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size);
memory_region_init_ram(&s->imif_ram, "omap1.sram", s->sram_size);
vmstate_register_ram_global(&s->imif_ram);
memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram);
omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);

6
hw/omap2.c
View File

@ -2269,9 +2269,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
omap_clk_init(s);
/* Memory-mapped stuff */
memory_region_init_ram(&s->sdram, NULL, "omap2.dram", s->sdram_size);
memory_region_init_ram(&s->sdram, "omap2.dram", s->sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram);
memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size);
memory_region_init_ram(&s->sram, "omap2.sram", s->sram_size);
vmstate_register_ram_global(&s->sram);
memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram);
s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54);

6
hw/omap_sx1.c
View File

@ -124,7 +124,8 @@ static void sx1_init(ram_addr_t ram_size,
cpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
@ -165,7 +166,8 @@ static void sx1_init(ram_addr_t ram_size,
if ((version == 1) &&
(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size);
memory_region_init_ram(flash_1, "omap_sx1.flash1-0", flash1_size);
vmstate_register_ram_global(flash_1);
memory_region_set_readonly(flash_1, true);
memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);

3
hw/onenand.c
View File

@ -781,7 +781,8 @@ static int onenand_initfn(SysBusDevice *dev)
}
s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT),
0xff, (64 + 2) << PAGE_SHIFT);
memory_region_init_ram(&s->ram, NULL, "onenand.ram", 0xc000 << s->shift);
memory_region_init_ram(&s->ram, "onenand.ram", 0xc000 << s->shift);
vmstate_register_ram_global(&s->ram);
ram = memory_region_get_ram_ptr(&s->ram);
s->boot[0] = ram + (0x0000 << s->shift);
s->boot[1] = ram + (0x8000 << s->shift);

3
hw/palm.c
View File

@ -211,7 +211,8 @@ static void palmte_init(ram_addr_t ram_size,
cpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
/* External Flash (EMIFS) */
memory_region_init_ram(flash, NULL, "palmte.flash", flash_size);
memory_region_init_ram(flash, "palmte.flash", flash_size);
vmstate_register_ram_global(flash);
memory_region_set_readonly(flash, true);
memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash);

9
hw/pc.c
View File

@ -987,8 +987,9 @@ void pc_memory_init(MemoryRegion *system_memory,
* with older qemus that used qemu_ram_alloc().
*/
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "pc.ram",
memory_region_init_ram(ram, "pc.ram",
below_4g_mem_size + above_4g_mem_size);
vmstate_register_ram_global(ram);
*ram_memory = ram;
ram_below_4g = g_malloc(sizeof(*ram_below_4g));
memory_region_init_alias(ram_below_4g, "ram-below-4g", ram,
@ -1016,7 +1017,8 @@ void pc_memory_init(MemoryRegion *system_memory,
goto bios_error;
}
bios = g_malloc(sizeof(*bios));
memory_region_init_ram(bios, NULL, "pc.bios", bios_size);
memory_region_init_ram(bios, "pc.bios", bios_size);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1);
if (ret != 0) {
@ -1041,7 +1043,8 @@ void pc_memory_init(MemoryRegion *system_memory,
memory_region_set_readonly(isa_bios, true);
option_rom_mr = g_malloc(sizeof(*option_rom_mr));
memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE);
memory_region_init_ram(option_rom_mr, "pc.rom", PC_ROM_SIZE);
vmstate_register_ram_global(option_rom_mr);
memory_region_add_subregion_overlap(rom_memory,
PC_ROM_MIN_VGA,
option_rom_mr,

4
hw/pci.c
View File

@ -1765,7 +1765,8 @@ static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom)
else
snprintf(name, sizeof(name), "%s.rom", pdev->qdev.info->name);
pdev->has_rom = true;
memory_region_init_ram(&pdev->rom, &pdev->qdev, name, size);
memory_region_init_ram(&pdev->rom, name, size);
vmstate_register_ram(&pdev->rom, &pdev->qdev);
ptr = memory_region_get_ram_ptr(&pdev->rom);
load_image(path, ptr);
g_free(path);
@ -1787,6 +1788,7 @@ static void pci_del_option_rom(PCIDevice *pdev)
if (!pdev->has_rom)
return;
vmstate_unregister_ram(&pdev->rom, &pdev->qdev);
memory_region_destroy(&pdev->rom);
pdev->has_rom = false;
}

6
hw/petalogix_ml605_mmu.c
View File

@ -162,11 +162,13 @@ petalogix_ml605_init(ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, env);
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
memory_region_init_ram(phys_lmb_bram, "petalogix_ml605.lmb_bram",
LMB_BRAM_SIZE);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size);
memory_region_init_ram(phys_ram, "petalogix_ml605.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);

7
hw/petalogix_s3adsp1800_mmu.c
View File

@ -141,12 +141,13 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, env);
/* Attach emulated BRAM through the LMB. */
memory_region_init_ram(phys_lmb_bram, NULL,
memory_region_init_ram(phys_lmb_bram,
"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
ram_size);
memory_region_init_ram(phys_ram, "petalogix_s3adsp1800.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(sysmem, ddr_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);

4
hw/pflash_cfi01.c
View File

@ -589,7 +589,8 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
memory_region_init_rom_device(
&pfl->mem, be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl,
qdev, name, size);
name, size);
vmstate_register_ram(&pfl->mem, qdev);
pfl->storage = memory_region_get_ram_ptr(&pfl->mem);
memory_region_add_subregion(get_system_memory(), base, &pfl->mem);
@ -599,6 +600,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
ret = bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);
if (ret < 0) {
memory_region_del_subregion(get_system_memory(), &pfl->mem);
vmstate_unregister_ram(&pfl->mem, qdev);
memory_region_destroy(&pfl->mem);
g_free(pfl);
return NULL;

3
hw/pflash_cfi02.c
View File

@ -628,7 +628,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base,
pfl = g_malloc0(sizeof(pflash_t));
memory_region_init_rom_device(
&pfl->orig_mem, be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl,
qdev, name, size);
name, size);
vmstate_register_ram(&pfl->orig_mem, qdev);
pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem);
pfl->base = base;
pfl->chip_len = chip_len;

18
hw/ppc405_boards.c
View File

@ -198,7 +198,8 @@ static void ref405ep_init (ram_addr_t ram_size,
MemoryRegion *sysmem = get_system_memory();
/* XXX: fix this */
memory_region_init_ram(&ram_memories[0], NULL, "ef405ep.ram", 0x08000000);
memory_region_init_ram(&ram_memories[0], "ef405ep.ram", 0x08000000);
vmstate_register_ram_global(&ram_memories[0]);
ram_bases[0] = 0;
ram_sizes[0] = 0x08000000;
memory_region_init(&ram_memories[1], "ef405ep.ram1", 0);
@ -212,7 +213,8 @@ static void ref405ep_init (ram_addr_t ram_size,
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size);
memory_region_init_ram(sram, "ef405ep.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
@ -243,7 +245,8 @@ static void ref405ep_init (ram_addr_t ram_size,
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, "ef405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@ -513,12 +516,14 @@ static void taihu_405ep_init(ram_addr_t ram_size,
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
memory_region_init_ram(&ram_memories[0], NULL,
memory_region_init_ram(&ram_memories[0],
"taihu_405ep.ram-0", 0x04000000);
vmstate_register_ram_global(&ram_memories[0]);
ram_bases[0] = 0;
ram_sizes[0] = 0x04000000;
memory_region_init_ram(&ram_memories[1], NULL,
memory_region_init_ram(&ram_memories[1],
"taihu_405ep.ram-1", 0x04000000);
vmstate_register_ram_global(&ram_memories[1]);
ram_bases[1] = 0x04000000;
ram_sizes[1] = 0x04000000;
ram_size = 0x08000000;
@ -560,7 +565,8 @@ static void taihu_405ep_init(ram_addr_t ram_size,
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
memory_region_init_ram(bios, "taihu_405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = load_image(filename, memory_region_get_ram_ptr(bios));

3
hw/ppc405_uc.c
View File

@ -966,7 +966,8 @@ static void ppc405_ocm_init(CPUState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096);
memory_region_init_ram(&ocm->isarc_ram, "ppc405.ocm", 4096);
vmstate_register_ram_global(&ocm->isarc_ram);
memory_region_init_alias(&ocm->dsarc_ram, "ppc405.dsarc", &ocm->isarc_ram,
0, 4096);
qemu_register_reset(&ocm_reset, ocm);

3
hw/ppc4xx_devs.c
View File

@ -686,7 +686,8 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
if (bank_size <= size_left) {
char name[32];
snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
memory_region_init_ram(&ram_memories[i], NULL, name, bank_size);
memory_region_init_ram(&ram_memories[i], name, bank_size);
vmstate_register_ram_global(&ram_memories[i]);
ram_bases[i] = base;
ram_sizes[i] = bank_size;
base += ram_size;

6
hw/ppc_newworld.c
View File

@ -171,11 +171,13 @@ static void ppc_core99_init (ram_addr_t ram_size,
}
/* allocate RAM */
memory_region_init_ram(ram, NULL, "ppc_core99.ram", ram_size);
memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

6
hw/ppc_oldworld.c
View File

@ -116,11 +116,13 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
exit(1);
}
memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

6
hw/ppc_prep.c
View File

@ -554,11 +554,13 @@ static void ppc_prep_init (ram_addr_t ram_size,
}
/* allocate RAM */
memory_region_init_ram(ram, NULL, "ppc_prep.ram", ram_size);
memory_region_init_ram(ram, "ppc_prep.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_prep.bios", BIOS_SIZE);
memory_region_init_ram(bios, "ppc_prep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

3
hw/ppce500_mpc8544ds.c
View File

@ -292,7 +292,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
ram_size &= ~(RAM_SIZES_ALIGN - 1);
/* Register Memory */
memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
memory_region_init_ram(ram, "mpc8544ds.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space_mem, 0, ram);
/* MPIC */

12
hw/pxa2xx.c
View File

@ -2046,9 +2046,11 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size);
memory_region_init_ram(&s->sdram, "pxa270.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000);
memory_region_init_ram(&s->internal, "pxa270.internal", 0x40000);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);
@ -2175,10 +2177,12 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0];
/* SDRAM & Internal Memory Storage */
memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size);
memory_region_init_ram(&s->sdram, "pxa255.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram);
memory_region_init_ram(&s->internal, NULL, "pxa255.internal",
memory_region_init_ram(&s->internal, "pxa255.internal",
PXA2XX_INTERNAL_SIZE);
vmstate_register_ram_global(&s->internal);
memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
&s->internal);

12
hw/qxl.c
View File

@ -1554,8 +1554,8 @@ static int qxl_init_common(PCIQXLDevice *qxl)
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
qxl->rom_size = qxl_rom_size();
memory_region_init_ram(&qxl->rom_bar, &qxl->pci.qdev, "qxl.vrom",
qxl->rom_size);
memory_region_init_ram(&qxl->rom_bar, "qxl.vrom", qxl->rom_size);
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
init_qxl_rom(qxl);
init_qxl_ram(qxl);
@ -1566,8 +1566,8 @@ static int qxl_init_common(PCIQXLDevice *qxl)
qxl->vram_size = 4096;
}
qxl->vram_size = msb_mask(qxl->vram_size * 2 - 1);
memory_region_init_ram(&qxl->vram_bar, &qxl->pci.qdev, "qxl.vram",
qxl->vram_size);
memory_region_init_ram(&qxl->vram_bar, "qxl.vram", qxl->vram_size);
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
io_size = msb_mask(QXL_IO_RANGE_SIZE * 2 - 1);
if (qxl->revision == 1) {
@ -1643,8 +1643,8 @@ static int qxl_init_secondary(PCIDevice *dev)
ram_size = 16 * 1024 * 1024;
}
qxl->vga.vram_size = ram_size;
memory_region_init_ram(&qxl->vga.vram, &qxl->pci.qdev, "qxl.vgavram",
qxl->vga.vram_size);
memory_region_init_ram(&qxl->vga.vram, "qxl.vgavram", qxl->vga.vram_size);
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
return qxl_init_common(qxl);

3
hw/r2d.c
View File

@ -249,7 +249,8 @@ static void r2d_init(ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate memory space */
memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
memory_region_init_ram(sdram, "r2d.sdram", SDRAM_SIZE);
vmstate_register_ram_global(sdram);
memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
/* Register peripherals */
s = sh7750_init(env, address_space_mem);

9
hw/realview.c
View File

@ -183,11 +183,13 @@ static void realview_init(ram_addr_t ram_size,
/* Core tile RAM. */
low_ram_size = ram_size - 0x20000000;
ram_size = 0x20000000;
memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size);
memory_region_init_ram(ram_lo, "realview.lowmem", low_ram_size);
vmstate_register_ram_global(ram_lo);
memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
}
memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size);
memory_region_init_ram(ram_hi, "realview.highmem", ram_size);
vmstate_register_ram_global(ram_hi);
low_ram_size = ram_size;
if (low_ram_size > 0x10000000)
low_ram_size = 0x10000000;
@ -377,7 +379,8 @@ static void realview_init(ram_addr_t ram_size,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000);
memory_region_init_ram(ram_hack, "realview.hack", 0x1000);
vmstate_register_ram_global(ram_hack);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
realview_binfo.ram_size = ram_size;

3
hw/s390-virtio.c
View File

@ -184,7 +184,8 @@ static void s390_init(ram_addr_t my_ram_size,
s390_bus = s390_virtio_bus_init(&my_ram_size);
/* allocate RAM */
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_init_ram(ram, "s390.ram", my_ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* clear virtio region */

9
hw/shix.c
View File

@ -57,14 +57,17 @@ static void shix_init(ram_addr_t ram_size,
/* Allocate memory space */
printf("Allocating ROM\n");
memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
memory_region_init_ram(rom, "shix.rom", 0x4000);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(sysmem, 0x00000000, rom);
printf("Allocating SDRAM 1\n");
memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
memory_region_init_ram(&sdram[0], "shix.sdram1", 0x01000000);
vmstate_register_ram_global(&sdram[0]);
memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
printf("Allocating SDRAM 2\n");
memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
memory_region_init_ram(&sdram[1], "shix.sdram2", 0x01000000);
vmstate_register_ram_global(&sdram[1]);
memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
/* Load BIOS in 0 (and access it through P2, 0xA0000000) */

3
hw/sm501.c
View File

@ -1405,8 +1405,9 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
s->dc_crt_control = 0x00010000;
/* allocate local memory */
memory_region_init_ram(&s->local_mem_region, NULL, "sm501.local",
memory_region_init_ram(&s->local_mem_region, "sm501.local",
local_mem_bytes);
vmstate_register_ram_global(&s->local_mem_region);
s->local_mem = memory_region_get_ram_ptr(&s->local_mem_region);
memory_region_add_subregion(address_space_mem, base, &s->local_mem_region);

3
hw/spapr.c
View File

@ -457,7 +457,8 @@ static void ppc_spapr_init(ram_addr_t ram_size,
ram_addr_t nonrma_base = rma_alloc_size;
ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, nonrma_base, ram);
}

3
hw/spitz.c
View File

@ -894,7 +894,8 @@ static void spitz_common_init(ram_addr_t ram_size,
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
memory_region_init_ram(rom, "spitz.rom", SPITZ_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/strongarm.c
View File

@ -1511,7 +1511,8 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
exit(1);
}
memory_region_init_ram(&s->sdram, NULL, "strongarm.sdram", sdram_size);
memory_region_init_ram(&s->sdram, "strongarm.sdram", sdram_size);
vmstate_register_ram_global(&s->sdram);
memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
pic = arm_pic_init_cpu(s->env);

12
hw/sun4m.c
View File

@ -602,7 +602,8 @@ static int idreg_init1(SysBusDevice *dev)
{
IDRegState *s = FROM_SYSBUS(IDRegState, dev);
memory_region_init_ram(&s->mem, NULL, "sun4m.idreg", sizeof(idreg_data));
memory_region_init_ram(&s->mem, "sun4m.idreg", sizeof(idreg_data));
vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem);
return 0;
@ -643,7 +644,8 @@ static int afx_init1(SysBusDevice *dev)
{
AFXState *s = FROM_SYSBUS(AFXState, dev);
memory_region_init_ram(&s->mem, NULL, "sun4m.afx", 4);
memory_region_init_ram(&s->mem, "sun4m.afx", 4);
vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem);
return 0;
}
@ -711,7 +713,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
memory_region_init_ram(&s->prom, NULL, "sun4m.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, "sun4m.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
return 0;
@ -745,7 +748,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
memory_region_init_ram(&d->ram, NULL, "sun4m.ram", d->size);
memory_region_init_ram(&d->ram, "sun4m.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
}

6
hw/sun4u.c
View File

@ -629,7 +629,8 @@ static int prom_init1(SysBusDevice *dev)
{
PROMState *s = FROM_SYSBUS(PROMState, dev);
memory_region_init_ram(&s->prom, NULL, "sun4u.prom", PROM_SIZE_MAX);
memory_region_init_ram(&s->prom, "sun4u.prom", PROM_SIZE_MAX);
vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom);
return 0;
@ -664,7 +665,8 @@ static int ram_init1(SysBusDevice *dev)
{
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
memory_region_init_ram(&d->ram, NULL, "sun4u.ram", d->size);
memory_region_init_ram(&d->ram, "sun4u.ram", d->size);
vmstate_register_ram_global(&d->ram);
sysbus_init_mmio(dev, &d->ram);
return 0;
}

3
hw/tc6393xb.c
View File

@ -568,7 +568,8 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
memory_region_init_io(&s->iomem, &tc6393xb_ops, s, "tc6393xb", 0x10000);
memory_region_add_subregion(sysmem, base, &s->iomem);
memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000);
memory_region_init_ram(&s->vram, "tc6393xb.vram", 0x100000);
vmstate_register_ram_global(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);
s->scr_width = 480;

3
hw/tcx.c
View File

@ -520,8 +520,9 @@ static int tcx_init1(SysBusDevice *dev)
int size;
uint8_t *vram_base;
memory_region_init_ram(&s->vram_mem, NULL, "tcx.vram",
memory_region_init_ram(&s->vram_mem, "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* 8-bit plane */

3
hw/tosa.c
View File

@ -218,7 +218,8 @@ static void tosa_init(ram_addr_t ram_size,
cpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM);
memory_region_init_ram(rom, "tosa.rom", TOSA_ROM);
vmstate_register_ram_global(rom);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);

3
hw/versatilepb.c
View File

@ -190,7 +190,8 @@ static void versatile_init(ram_addr_t ram_size,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
memory_region_init_ram(ram, NULL, "versatile.ram", ram_size);
memory_region_init_ram(ram, "versatile.ram", ram_size);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
memory_region_add_subregion(sysmem, 0, ram);

12
hw/vexpress.c
View File

@ -77,7 +77,8 @@ static void vexpress_a9_init(ram_addr_t ram_size,
exit(1);
}
memory_region_init_ram(ram, NULL, "vexpress.highmem", ram_size);
memory_region_init_ram(ram, "vexpress.highmem", ram_size);
vmstate_register_ram_global(ram);
low_ram_size = ram_size;
if (low_ram_size > 0x4000000) {
low_ram_size = 0x4000000;
@ -181,14 +182,16 @@ static void vexpress_a9_init(ram_addr_t ram_size,
/* CS4: NOR1 flash : 0x44000000 .. 0x48000000 */
/* CS2: SRAM : 0x48000000 .. 0x4a000000 */
sram_size = 0x2000000;
memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size);
memory_region_init_ram(sram, "vexpress.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_add_subregion(sysmem, 0x48000000, sram);
/* CS3: USB, ethernet, VRAM : 0x4c000000 .. 0x50000000 */
/* 0x4c000000 Video RAM */
vram_size = 0x800000;
memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size);
memory_region_init_ram(vram, "vexpress.vram", vram_size);
vmstate_register_ram_global(vram);
memory_region_add_subregion(sysmem, 0x4c000000, vram);
/* 0x4e000000 LAN9118 Ethernet */
@ -202,7 +205,8 @@ static void vexpress_a9_init(ram_addr_t ram_size,
startup code. I guess this works on real hardware because the
BootROM happens to be in ROM/flash or in memory that isn't clobbered
until after Linux boots the secondary CPUs. */
memory_region_init_ram(hackram, NULL, "vexpress.hack", 0x1000);
memory_region_init_ram(hackram, "vexpress.hack", 0x1000);
vmstate_register_ram_global(hackram);
memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, hackram);
vexpress_binfo.ram_size = ram_size;

3
hw/vga.c
View File

@ -2222,7 +2222,8 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
#else
s->is_vbe_vmstate = 0;
#endif
memory_region_init_ram(&s->vram, NULL, "vga.vram", vga_ram_size);
memory_region_init_ram(&s->vram, "vga.vram", vga_ram_size);
vmstate_register_ram_global(&s->vram);
xen_register_framebuffer(&s->vram);
s->vram_ptr = memory_region_get_ram_ptr(&s->vram);
s->vram_size = vga_ram_size;

3
hw/virtex_ml507.c
View File

@ -205,7 +205,8 @@ static void virtex_init(ram_addr_t ram_size,
env = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
qemu_register_reset(main_cpu_reset, env);
memory_region_init_ram(phys_ram, NULL, "ram", ram_size);
memory_region_init_ram(phys_ram, "ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);

3
hw/vmware_vga.c
View File

@ -1091,7 +1091,8 @@ static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size,
s->fifo_size = SVGA_FIFO_SIZE;
memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size);
memory_region_init_ram(&s->fifo_ram, "vmsvga.fifo", s->fifo_size);
vmstate_register_ram_global(&s->fifo_ram);
s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram);
vga_common_init(&s->vga, vga_ram_size);

9
hw/xtensa_lx60.c
View File

@ -136,7 +136,8 @@ static void lx60_net_init(MemoryRegion *address_space,
sysbus_mmio_get_region(s, 1));
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "open_eth.ram", 16384);
memory_region_init_ram(ram, "open_eth.ram", 16384);
vmstate_register_ram_global(ram);
memory_region_add_subregion(address_space, buffers, ram);
}
@ -186,7 +187,8 @@ static void lx_init(const LxBoardDesc *board,
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "lx60.dram", ram_size);
memory_region_init_ram(ram, "lx60.dram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(system_memory, 0, ram);
system_io = g_malloc(sizeof(*system_io));
@ -221,7 +223,8 @@ static void lx_init(const LxBoardDesc *board,
/* Use presence of kernel file name as 'boot from SRAM' switch. */
if (kernel_filename) {
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
memory_region_init_ram(rom, "lx60.sram", board->sram_size);
vmstate_register_ram_global(rom);
memory_region_add_subregion(system_memory, 0xfe000000, rom);
/* Put kernel bootparameters to the end of that SRAM */

6
hw/xtensa_sim.c
View File

@ -66,11 +66,13 @@ static void sim_init(ram_addr_t ram_size,
}
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size);
memory_region_init_ram(ram, "xtensa.sram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000);
memory_region_init_ram(rom, "xtensa.rom", 0x1000);
vmstate_register_ram_global(rom);
memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);
if (kernel_filename) {

9
memory.c
View File

@ -1033,7 +1033,6 @@ void memory_region_init_io(MemoryRegion *mr,
}
void memory_region_init_ram(MemoryRegion *mr,
DeviceState *dev,
const char *name,
uint64_t size)
{
@ -1041,12 +1040,11 @@ void memory_region_init_ram(MemoryRegion *mr,
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram;
mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
mr->ram_addr = qemu_ram_alloc(size, mr);
mr->backend_registered = true;
}
void memory_region_init_ram_ptr(MemoryRegion *mr,
DeviceState *dev,
const char *name,
uint64_t size,
void *ptr)
@ -1055,7 +1053,7 @@ void memory_region_init_ram_ptr(MemoryRegion *mr,
mr->ram = true;
mr->terminates = true;
mr->destructor = memory_region_destructor_ram_from_ptr;
mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr, mr);
mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
mr->backend_registered = true;
}
@ -1073,7 +1071,6 @@ void memory_region_init_alias(MemoryRegion *mr,
void memory_region_init_rom_device(MemoryRegion *mr,
const MemoryRegionOps *ops,
void *opaque,
DeviceState *dev,
const char *name,
uint64_t size)
{
@ -1082,7 +1079,7 @@ void memory_region_init_rom_device(MemoryRegion *mr,
mr->opaque = opaque;
mr->terminates = true;
mr->destructor = memory_region_destructor_rom_device;
mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
mr->ram_addr = qemu_ram_alloc(size, mr);
mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
memory_region_write_thunk,
mr,

18
memory.h
View File

@ -224,14 +224,10 @@ void memory_region_init_io(MemoryRegion *mr,
* region will modify memory directly.
*
* @mr: the #MemoryRegion to be initialized.
* @dev: a device associated with the region; may be %NULL.
* @name: the name of the region; the pair (@dev, @name) must be globally
* unique. The name is part of the save/restore ABI and so cannot be
* changed.
* @name: the name of the region.
* @size: size of the region.
*/
void memory_region_init_ram(MemoryRegion *mr,
DeviceState *dev, /* FIXME: layering violation */
const char *name,
uint64_t size);
@ -241,15 +237,11 @@ void memory_region_init_ram(MemoryRegion *mr,
* memory directly.
*
* @mr: the #MemoryRegion to be initialized.
* @dev: a device associated with the region; may be %NULL.
* @name: the name of the region; the pair (@dev, @name) must be globally
* unique. The name is part of the save/restore ABI and so cannot be
* changed.
* @name: the name of the region.
* @size: size of the region.
* @ptr: memory to be mapped; must contain at least @size bytes.
*/
void memory_region_init_ram_ptr(MemoryRegion *mr,
DeviceState *dev, /* FIXME: layering violation */
const char *name,
uint64_t size,
void *ptr);
@ -277,16 +269,12 @@ void memory_region_init_alias(MemoryRegion *mr,
*
* @mr: the #MemoryRegion to be initialized.
* @ops: callbacks for write access handling.
* @dev: a device associated with the region; may be %NULL.
* @name: the name of the region; the pair (@dev, @name) must be globally
* unique. The name is part of the save/restore ABI and so cannot be
* changed.
* @name: the name of the region.
* @size: size of the region.
*/
void memory_region_init_rom_device(MemoryRegion *mr,
const MemoryRegionOps *ops,
void *opaque,
DeviceState *dev, /* FIXME: layering violation */
const char *name,
uint64_t size);

17
savevm.c
View File

@ -83,6 +83,7 @@
#include "qemu-queue.h"
#include "qemu-timer.h"
#include "cpus.h"
#include "memory.h"
#define SELF_ANNOUNCE_ROUNDS 5
@ -2280,3 +2281,19 @@ void do_info_snapshots(Monitor *mon)
g_free(available_snapshots);
}
void vmstate_register_ram(MemoryRegion *mr, DeviceState *dev)
{
qemu_ram_set_idstr(memory_region_get_ram_addr(mr),
memory_region_name(mr), dev);
}
void vmstate_unregister_ram(MemoryRegion *mr, DeviceState *dev)
{
/* Nothing do to while the implementation is in RAMBlock */
}
void vmstate_register_ram_global(MemoryRegion *mr)
{
vmstate_register_ram(mr, NULL);
}

3
xen-all.c
View File

@ -154,7 +154,8 @@ static void xen_ram_init(ram_addr_t ram_size)
*/
block_len += HVM_BELOW_4G_MMIO_LENGTH;
}
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len);
memory_region_init_ram(&ram_memory, "xen.ram", block_len);
vmstate_register_ram_global(&ram_memory);
if (ram_size >= HVM_BELOW_4G_RAM_END) {
above_4g_mem_size = ram_size - HVM_BELOW_4G_RAM_END;