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aspeed: add a ram_size property to the memory controller 

Configure the size of the RAM of the SOC using a property to propagate
the value down to the memory controller from the board level.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2016-09-22 18:13:06 +01:00 committed by Peter Maydell
parent b2fd45458d
commit c6c7cfb01a
4 changed files with 18 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hw/arm/aspeed.c
View File

@ -113,6 +113,8 @@ static void aspeed_board_init(MachineState *machine,
&bmc->ram);
object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size",
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
&error_abort);
object_property_set_bool(OBJECT(&bmc->soc), true, "realized",

2
hw/arm/aspeed_soc.c
View File

@ -113,6 +113,8 @@ static void aspeed_soc_init(Object *obj)
qdev_set_parent_bus(DEVICE(&s->sdmc), sysbus_get_default());
qdev_prop_set_uint32(DEVICE(&s->sdmc), "silicon-rev",
sc->info->silicon_rev);
object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
"ram-size", &error_abort);
}
static void aspeed_soc_realize(DeviceState *dev, Error **errp)

23
hw/misc/aspeed_sdmc.c
View File

@ -140,9 +140,9 @@ static const MemoryRegionOps aspeed_sdmc_ops = {
.valid.max_access_size = 4,
};
static int ast2400_rambits(void)
static int ast2400_rambits(AspeedSDMCState *s)
{
switch (ram_size >> 20) {
switch (s->ram_size >> 20) {
case 64:
return ASPEED_SDMC_DRAM_64MB;
case 128:
@ -156,14 +156,15 @@ static int ast2400_rambits(void)
}
/* use a common default */
error_report("warning: Invalid RAM size 0x" RAM_ADDR_FMT
". Using default 256M", ram_size);
error_report("warning: Invalid RAM size 0x%" PRIx64
". Using default 256M", s->ram_size);
s->ram_size = 256 << 20;
return ASPEED_SDMC_DRAM_256MB;
}
static int ast2500_rambits(void)
static int ast2500_rambits(AspeedSDMCState *s)
{
switch (ram_size >> 20) {
switch (s->ram_size >> 20) {
case 128:
return ASPEED_SDMC_AST2500_128MB;
case 256:
@ -177,8 +178,9 @@ static int ast2500_rambits(void)
}
/* use a common default */
error_report("warning: Invalid RAM size 0x" RAM_ADDR_FMT
". Using default 512M", ram_size);
error_report("warning: Invalid RAM size 0x%" PRIx64
". Using default 512M", s->ram_size);
s->ram_size = 512 << 20;
return ASPEED_SDMC_AST2500_512MB;
}
@ -222,11 +224,11 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
switch (s->silicon_rev) {
case AST2400_A0_SILICON_REV:
s->ram_bits = ast2400_rambits();
s->ram_bits = ast2400_rambits(s);
break;
case AST2500_A0_SILICON_REV:
case AST2500_A1_SILICON_REV:
s->ram_bits = ast2500_rambits();
s->ram_bits = ast2500_rambits(s);
break;
default:
g_assert_not_reached();
@ -249,6 +251,7 @@ static const VMStateDescription vmstate_aspeed_sdmc = {
static Property aspeed_sdmc_properties[] = {
DEFINE_PROP_UINT32("silicon-rev", AspeedSDMCState, silicon_rev, 0),
DEFINE_PROP_UINT64("ram-size", AspeedSDMCState, ram_size, 0),
DEFINE_PROP_END_OF_LIST(),
};

1
include/hw/misc/aspeed_sdmc.h
View File

@ -26,6 +26,7 @@ typedef struct AspeedSDMCState {
uint32_t regs[ASPEED_SDMC_NR_REGS];
uint32_t silicon_rev;
uint32_t ram_bits;
uint64_t ram_size;
} AspeedSDMCState;