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target/openrisc: Merge disas_openrisc_insn 

Acked-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2018-02-20 11:18:07 -08:00
parent 6fd204a2e9
commit c7b6f54bf8
1 changed files with 4 additions and 9 deletions
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13
target/openrisc/translate.c
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@ -1373,14 +1373,6 @@ static bool trans_lf_sfle_s(DisasContext *dc, arg_ab *a, uint32_t insn)
return true; return true;
} }
static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu)
{
uint32_t insn = cpu_ldl_code(&cpu->env, dc->base.pc_next);
if (!decode(dc, insn)) {
gen_illegal_exception(dc);
}
}
static void openrisc_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs) static void openrisc_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs)
{ {
DisasContext *dc = container_of(dcb, DisasContext, base); DisasContext *dc = container_of(dcb, DisasContext, base);
@ -1435,8 +1427,11 @@ static void openrisc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
{ {
DisasContext *dc = container_of(dcbase, DisasContext, base); DisasContext *dc = container_of(dcbase, DisasContext, base);
OpenRISCCPU *cpu = OPENRISC_CPU(cs); OpenRISCCPU *cpu = OPENRISC_CPU(cs);
uint32_t insn = cpu_ldl_code(&cpu->env, dc->base.pc_next);
disas_openrisc_insn(dc, cpu); if (!decode(dc, insn)) {
gen_illegal_exception(dc);
}
dc->base.pc_next += 4; dc->base.pc_next += 4;
/* delay slot */ /* delay slot */