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target/m68k: fix m68k_cpu_dump_state() 

Display correctly the Trace bits for 680x0
(2 bits instead of 1 for Coldfire).

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180104012913.30763-18-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier 2018-01-04 02:29:13 +01:00
parent 6e22b28e22
commit cc52302676
2 changed files with 8 additions and 4 deletions
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3
target/m68k/cpu.h
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@ -219,7 +219,8 @@ typedef enum {
#define SR_I 0x0700
#define SR_M 0x1000
#define SR_S 0x2000
#define SR_T 0x8000
#define SR_T_SHIFT 14
#define SR_T 0xc000
#define M68K_SSP 0
#define M68K_USP 1

9
target/m68k/translate.c
View File

@ -5936,9 +5936,12 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
}
cpu_fprintf (f, "PC = %08x ", env->pc);
sr = env->sr | cpu_m68k_get_ccr(env);
cpu_fprintf(f, "SR = %04x %c%c%c%c%c ", sr, (sr & CCF_X) ? 'X' : '-',
(sr & CCF_N) ? 'N' : '-', (sr & CCF_Z) ? 'Z' : '-',
(sr & CCF_V) ? 'V' : '-', (sr & CCF_C) ? 'C' : '-');
cpu_fprintf(f, "SR = %04x T:%x I:%x %c%c %c%c%c%c%c\n",
sr, (sr & SR_T) >> SR_T_SHIFT, (sr & SR_I) >> SR_I_SHIFT,
(sr & SR_S) ? 'S' : 'U', (sr & SR_M) ? '%' : 'I',
(sr & CCF_X) ? 'X' : '-', (sr & CCF_N) ? 'N' : '-',
(sr & CCF_Z) ? 'Z' : '-', (sr & CCF_V) ? 'V' : '-',
(sr & CCF_C) ? 'C' : '-');
cpu_fprintf(f, "FPSR = %08x %c%c%c%c ", env->fpsr,
(env->fpsr & FPSR_CC_A) ? 'A' : '-',
(env->fpsr & FPSR_CC_I) ? 'I' : '-',