mirror of https://gitee.com/openkylin/qemu.git
fpu/softfloat: re-factor div
We can now add float16_div and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 versions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Alex Bennée
parent
74d707e2cc
commit
cf07323d49
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@ -625,6 +625,54 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
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}
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/* From the GNU Multi Precision Library - longlong.h __udiv_qrnnd
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* (https://gmplib.org/repo/gmp/file/tip/longlong.h)
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*
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* Licensed under the GPLv2/LGPLv3
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*/
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static uint64_t div128To64(uint64_t n0, uint64_t n1, uint64_t d)
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{
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uint64_t d0, d1, q0, q1, r1, r0, m;
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d0 = (uint32_t)d;
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d1 = d >> 32;
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r1 = n1 % d1;
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q1 = n1 / d1;
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m = q1 * d0;
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r1 = (r1 << 32) | (n0 >> 32);
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if (r1 < m) {
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q1 -= 1;
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r1 += d;
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if (r1 >= d) {
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if (r1 < m) {
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q1 -= 1;
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r1 += d;
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}
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}
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}
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r1 -= m;
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r0 = r1 % d1;
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q0 = r1 / d1;
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m = q0 * d0;
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r0 = (r0 << 32) | (uint32_t)n0;
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if (r0 < m) {
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q0 -= 1;
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r0 += d;
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if (r0 >= d) {
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if (r0 < m) {
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q0 -= 1;
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r0 += d;
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}
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}
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}
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r0 -= m;
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/* Return remainder in LSB */
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return (q1 << 32) | q0 | (r0 != 0);
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}
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/*----------------------------------------------------------------------------
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| Returns an approximation to the square root of the 32-bit significand given
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| by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of
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236
fpu/softfloat.c
236
fpu/softfloat.c
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@ -816,6 +816,94 @@ float64 __attribute__((flatten)) float64_mul(float64 a, float64 b,
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return float64_round_pack_canonical(pr, status);
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}
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/*
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* Returns the result of dividing the floating-point value `a' by the
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* corresponding value `b'. The operation is performed according to
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* the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
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*/
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static FloatParts div_floats(FloatParts a, FloatParts b, float_status *s)
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{
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bool sign = a.sign ^ b.sign;
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if (a.cls == float_class_normal && b.cls == float_class_normal) {
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uint64_t temp_lo, temp_hi;
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int exp = a.exp - b.exp;
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if (a.frac < b.frac) {
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exp -= 1;
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shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT + 1,
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&temp_hi, &temp_lo);
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} else {
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shortShift128Left(0, a.frac, DECOMPOSED_BINARY_POINT,
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&temp_hi, &temp_lo);
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}
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/* LSB of quot is set if inexact which roundandpack will use
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* to set flags. Yet again we re-use a for the result */
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a.frac = div128To64(temp_lo, temp_hi, b.frac);
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a.sign = sign;
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a.exp = exp;
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return a;
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}
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/* handle all the NaN cases */
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if (is_nan(a.cls) || is_nan(b.cls)) {
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return pick_nan(a, b, s);
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}
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/* 0/0 or Inf/Inf */
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if (a.cls == b.cls
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&&
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(a.cls == float_class_inf || a.cls == float_class_zero)) {
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s->float_exception_flags |= float_flag_invalid;
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a.cls = float_class_dnan;
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return a;
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}
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/* Div 0 => Inf */
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if (b.cls == float_class_zero) {
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s->float_exception_flags |= float_flag_divbyzero;
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a.cls = float_class_inf;
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a.sign = sign;
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return a;
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}
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/* Inf / x or 0 / x */
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if (a.cls == float_class_inf || a.cls == float_class_zero) {
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a.sign = sign;
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return a;
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}
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/* Div by Inf */
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if (b.cls == float_class_inf) {
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a.cls = float_class_zero;
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a.sign = sign;
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return a;
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}
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g_assert_not_reached();
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}
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float16 float16_div(float16 a, float16 b, float_status *status)
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{
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FloatParts pa = float16_unpack_canonical(a, status);
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FloatParts pb = float16_unpack_canonical(b, status);
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FloatParts pr = div_floats(pa, pb, status);
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return float16_round_pack_canonical(pr, status);
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}
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float32 float32_div(float32 a, float32 b, float_status *status)
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{
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FloatParts pa = float32_unpack_canonical(a, status);
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FloatParts pb = float32_unpack_canonical(b, status);
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FloatParts pr = div_floats(pa, pb, status);
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return float32_round_pack_canonical(pr, status);
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}
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float64 float64_div(float64 a, float64 b, float_status *status)
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{
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FloatParts pa = float64_unpack_canonical(a, status);
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FloatParts pb = float64_unpack_canonical(b, status);
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FloatParts pr = div_floats(pa, pb, status);
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return float64_round_pack_canonical(pr, status);
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}
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/*----------------------------------------------------------------------------
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| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
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| and 7, and returns the properly rounded 32-bit integer corresponding to the
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@ -2627,77 +2715,6 @@ float32 float32_round_to_int(float32 a, float_status *status)
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}
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/*----------------------------------------------------------------------------
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| Returns the result of dividing the single-precision floating-point value `a'
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| by the corresponding value `b'. The operation is performed according to the
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| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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float32 float32_div(float32 a, float32 b, float_status *status)
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{
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flag aSign, bSign, zSign;
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int aExp, bExp, zExp;
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uint32_t aSig, bSig, zSig;
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a = float32_squash_input_denormal(a, status);
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b = float32_squash_input_denormal(b, status);
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aSig = extractFloat32Frac( a );
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aExp = extractFloat32Exp( a );
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aSign = extractFloat32Sign( a );
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bSig = extractFloat32Frac( b );
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bExp = extractFloat32Exp( b );
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bSign = extractFloat32Sign( b );
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zSign = aSign ^ bSign;
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if ( aExp == 0xFF ) {
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if (aSig) {
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return propagateFloat32NaN(a, b, status);
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}
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if ( bExp == 0xFF ) {
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if (bSig) {
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return propagateFloat32NaN(a, b, status);
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}
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float_raise(float_flag_invalid, status);
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return float32_default_nan(status);
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}
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return packFloat32( zSign, 0xFF, 0 );
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}
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if ( bExp == 0xFF ) {
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if (bSig) {
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return propagateFloat32NaN(a, b, status);
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}
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return packFloat32( zSign, 0, 0 );
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}
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if ( bExp == 0 ) {
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if ( bSig == 0 ) {
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if ( ( aExp | aSig ) == 0 ) {
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float_raise(float_flag_invalid, status);
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return float32_default_nan(status);
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}
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float_raise(float_flag_divbyzero, status);
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return packFloat32( zSign, 0xFF, 0 );
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}
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normalizeFloat32Subnormal( bSig, &bExp, &bSig );
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}
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if ( aExp == 0 ) {
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if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
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normalizeFloat32Subnormal( aSig, &aExp, &aSig );
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}
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zExp = aExp - bExp + 0x7D;
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aSig = ( aSig | 0x00800000 )<<7;
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bSig = ( bSig | 0x00800000 )<<8;
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if ( bSig <= ( aSig + aSig ) ) {
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aSig >>= 1;
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++zExp;
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}
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zSig = ( ( (uint64_t) aSig )<<32 ) / bSig;
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if ( ( zSig & 0x3F ) == 0 ) {
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zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 );
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}
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return roundAndPackFloat32(zSign, zExp, zSig, status);
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}
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/*----------------------------------------------------------------------------
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| Returns the remainder of the single-precision floating-point value `a'
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| with respect to the corresponding value `b'. The operation is performed
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@ -4159,83 +4176,6 @@ float64 float64_trunc_to_int(float64 a, float_status *status)
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return res;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of dividing the double-precision floating-point value `a'
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| by the corresponding value `b'. The operation is performed according to
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| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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float64 float64_div(float64 a, float64 b, float_status *status)
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{
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flag aSign, bSign, zSign;
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int aExp, bExp, zExp;
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uint64_t aSig, bSig, zSig;
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uint64_t rem0, rem1;
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uint64_t term0, term1;
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a = float64_squash_input_denormal(a, status);
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b = float64_squash_input_denormal(b, status);
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aSig = extractFloat64Frac( a );
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aExp = extractFloat64Exp( a );
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aSign = extractFloat64Sign( a );
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bSig = extractFloat64Frac( b );
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bExp = extractFloat64Exp( b );
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bSign = extractFloat64Sign( b );
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zSign = aSign ^ bSign;
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if ( aExp == 0x7FF ) {
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if (aSig) {
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return propagateFloat64NaN(a, b, status);
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}
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if ( bExp == 0x7FF ) {
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if (bSig) {
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return propagateFloat64NaN(a, b, status);
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}
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float_raise(float_flag_invalid, status);
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return float64_default_nan(status);
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}
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return packFloat64( zSign, 0x7FF, 0 );
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}
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if ( bExp == 0x7FF ) {
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if (bSig) {
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return propagateFloat64NaN(a, b, status);
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}
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return packFloat64( zSign, 0, 0 );
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}
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if ( bExp == 0 ) {
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if ( bSig == 0 ) {
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if ( ( aExp | aSig ) == 0 ) {
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float_raise(float_flag_invalid, status);
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return float64_default_nan(status);
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}
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float_raise(float_flag_divbyzero, status);
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return packFloat64( zSign, 0x7FF, 0 );
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}
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normalizeFloat64Subnormal( bSig, &bExp, &bSig );
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}
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if ( aExp == 0 ) {
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if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );
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normalizeFloat64Subnormal( aSig, &aExp, &aSig );
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}
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zExp = aExp - bExp + 0x3FD;
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aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;
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bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
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if ( bSig <= ( aSig + aSig ) ) {
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aSig >>= 1;
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++zExp;
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}
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zSig = estimateDiv128To64( aSig, 0, bSig );
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if ( ( zSig & 0x1FF ) <= 2 ) {
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mul64To128( bSig, zSig, &term0, &term1 );
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sub128( aSig, 0, term0, term1, &rem0, &rem1 );
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while ( (int64_t) rem0 < 0 ) {
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--zSig;
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add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
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}
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zSig |= ( rem1 != 0 );
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}
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return roundAndPackFloat64(zSign, zExp, zSig, status);
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}
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/*----------------------------------------------------------------------------
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| Returns the remainder of the double-precision floating-point value `a'
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@ -240,6 +240,7 @@ float64 float16_to_float64(float16 a, flag ieee, float_status *status);
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float16 float16_add(float16, float16, float_status *status);
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float16 float16_sub(float16, float16, float_status *status);
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float16 float16_mul(float16, float16, float_status *status);
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float16 float16_div(float16, float16, float_status *status);
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int float16_is_quiet_nan(float16, float_status *status);
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int float16_is_signaling_nan(float16, float_status *status);
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